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From: Alexander Monakov <amonakov@ispras.ru>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Daniel P. Berrangé" <berrange@redhat.com>,
	qemu-devel@nongnu.org,
	"Richard Henderson" <richard.henderson@linaro.org>
Subject: Re: [PATCH 0/5] Reinstate ability to use Qemu on pre-SSE4.1 x86 hosts
Date: Mon, 24 Jun 2024 00:27:33 +0300 (MSK)	[thread overview]
Message-ID: <972212d2-969d-263c-1ae0-84409703a8ce@ispras.ru> (raw)
In-Reply-To: <CABgObfbGa=xpp9-cLwzqCpPFsf27qM+K-svfXEvc6ffjb=_VAg@mail.gmail.com>

Hello,

On Wed, 12 Jun 2024, Paolo Bonzini wrote:

> I didn't do this because of RHEL9, I did it because it's silly that
> QEMU cannot use POPCNT and has to waste 2% of the L1 d-cache to
> compute the x86 parity flag (and POPCNT was introduced at the same
> time as SSE4.2).

I do not see where the 2% figure is coming from: even considering that
the 256-byte LUT may take an extra cache line due to misalignment, 320
bytes is still less than 1% of 32KB L1D size.

More importantly, the way this comment is phrased made me think that Qemu
eagerly computes PF. But the comment in target/i386/cpu.h is saying that
all flags are computed in an on-demand manner. Considering that software
pretty much never uses PF, why would the parity table be resident in L1D?
As far as I can see, the cost is rather a cache miss and perhaps a TLB miss
when PF is computed (mostly when EFLAGS are accessed all together on
context switches I think).

Is there something I'm not seeing?

Thanks.
Alexander


  parent reply	other threads:[~2024-06-23 21:28 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-12 10:55 [PATCH 0/5] Reinstate ability to use Qemu on pre-SSE4.1 x86 hosts Alexander Monakov
2024-06-12 10:55 ` [PATCH 1/5] Revert "host/i386: assume presence of POPCNT" Alexander Monakov
2024-06-12 10:55 ` [PATCH 2/5] Revert "host/i386: assume presence of SSSE3" Alexander Monakov
2024-06-12 10:55 ` [PATCH 3/5] Revert "host/i386: assume presence of SSE2" Alexander Monakov
2024-06-12 10:55 ` [PATCH 4/5] Revert "host/i386: assume presence of CMOV" Alexander Monakov
2024-06-12 10:55 ` [PATCH 5/5] Revert "meson: assume x86-64-v2 baseline ISA" Alexander Monakov
2024-06-12 11:04 ` [PATCH 0/5] Reinstate ability to use Qemu on pre-SSE4.1 x86 hosts Daniel P. Berrangé
2024-06-12 11:12   ` Paolo Bonzini
2024-06-12 11:19     ` Alexander Monakov
2024-06-12 11:29       ` Paolo Bonzini
2024-06-12 11:46         ` Alexander Monakov
2024-06-12 11:58           ` Paolo Bonzini
2024-06-12 12:10             ` Alexander Monakov
2024-06-12 12:13               ` Paolo Bonzini
2024-06-12 13:34                 ` Alexander Monakov
2024-06-12 13:39                   ` Paolo Bonzini
2024-06-12 14:27                     ` Alexander Monakov
2024-06-12 11:38     ` Daniel P. Berrangé
2024-06-12 11:51       ` Paolo Bonzini
2024-06-12 12:21         ` Daniel P. Berrangé
2024-06-12 15:09           ` Daniel P. Berrangé
2024-06-12 15:29             ` Paolo Bonzini
2024-06-12 15:40             ` Alexander Monakov
2024-06-12 16:24               ` Daniel P. Berrangé
2024-06-12 17:06             ` Daniel P. Berrangé
2024-06-12 17:00         ` Daniel P. Berrangé
2024-06-12 17:08           ` Paolo Bonzini
2024-06-23 21:27     ` Alexander Monakov [this message]
2024-06-23 22:14       ` Richard Henderson
2024-06-12 11:14   ` Alexander Monakov

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