From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:53383) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SF5yx-0001BS-B1 for qemu-devel@nongnu.org; Tue, 03 Apr 2012 11:49:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SF5yu-00061Q-B5 for qemu-devel@nongnu.org; Tue, 03 Apr 2012 11:49:18 -0400 Received: from mail-bk0-f45.google.com ([209.85.214.45]:61348) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SF5yu-00060o-1m for qemu-devel@nongnu.org; Tue, 03 Apr 2012 11:49:16 -0400 Received: by bkcjg9 with SMTP id jg9so4151714bkc.4 for ; Tue, 03 Apr 2012 08:49:13 -0700 (PDT) From: Artyom Tarasenko Date: Tue, 3 Apr 2012 17:49:04 +0200 Message-Id: <9752d94b9333062d8e3b74dffafc20f348167d95.1333467746.git.atar4qemu@gmail.com> Subject: [Qemu-devel] [PATCH 1/2][sparc64] Fix vector interrupt handling List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: blauwirbel@gmail.com, Artyom Tarasenko Don't produce stray irq 5, don't overwrite ivec_data if still busy with processing of the previous interrupt. Signed-off-by: Artyom Tarasenko --- hw/sun4u.c | 29 ++++++++++++++++------------- 1 files changed, 16 insertions(+), 13 deletions(-) diff --git a/hw/sun4u.c b/hw/sun4u.c index 1d67691..9d28194 100644 --- a/hw/sun4u.c +++ b/hw/sun4u.c @@ -315,19 +315,22 @@ static void cpu_set_ivec_irq(void *opaque, int irq, int level) CPUSPARCState *env = opaque; if (level) { - CPUIRQ_DPRINTF("Raise IVEC IRQ %d\n", irq); - env->interrupt_index = TT_IVEC; - env->pil_in |= 1 << 5; - env->ivec_status |= 0x20; - env->ivec_data[0] = (0x1f << 6) | irq; - env->ivec_data[1] = 0; - env->ivec_data[2] = 0; - cpu_interrupt(env, CPU_INTERRUPT_HARD); - } else { - CPUIRQ_DPRINTF("Lower IVEC IRQ %d\n", irq); - env->pil_in &= ~(1 << 5); - env->ivec_status &= ~0x20; - cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); + if (!(env->ivec_status & 0x20)) { + CPUIRQ_DPRINTF("Raise IVEC IRQ %d\n", irq); + env->halted = 0; + env->interrupt_index = TT_IVEC; + env->ivec_status |= 0x20; + env->ivec_data[0] = (0x1f << 6) | irq; + env->ivec_data[1] = 0; + env->ivec_data[2] = 0; + cpu_interrupt(env, CPU_INTERRUPT_HARD); + } + } else { + if (env->ivec_status & 0x20) { + CPUIRQ_DPRINTF("Lower IVEC IRQ %d\n", irq); + env->ivec_status &= ~0x20; + cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); + } } } -- 1.7.3.4