From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Bernhard Beschow" <shentey@gmail.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Hervé Poussineau" <hpoussin@reactos.org>
Subject: [PULL v3 35/62] hw/isa/piix3: Drop the "3" from PIIX base class name
Date: Sun, 22 Oct 2023 05:24:26 -0400 [thread overview]
Message-ID: <9769cfc3e419a704ff1d7feb4621da660903499a.1697966402.git.mst@redhat.com> (raw)
In-Reply-To: <cover.1697966402.git.mst@redhat.com>
From: Bernhard Beschow <shentey@gmail.com>
TYPE_PIIX3_PCI_DEVICE was the former base class of the Xen and non-Xen variants
of the PIIX3 ISA device models. It will become the base class for the PIIX3 and
PIIX4 device models, so drop the "3" from the type names.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-15-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/southbridge/piix.h | 6 ++--
hw/isa/piix3.c | 56 +++++++++++++++++------------------
2 files changed, 30 insertions(+), 32 deletions(-)
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index c56ce49fd3..0b257e1582 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -71,11 +71,9 @@ struct PIIXState {
bool has_usb;
bool smm_enabled;
};
-typedef struct PIIXState PIIX3State;
-#define TYPE_PIIX3_PCI_DEVICE "pci-piix3"
-DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE,
- TYPE_PIIX3_PCI_DEVICE)
+#define TYPE_PIIX_PCI_DEVICE "pci-piix"
+OBJECT_DECLARE_SIMPLE_TYPE(PIIXState, PIIX_PCI_DEVICE)
#define TYPE_PIIX3_DEVICE "PIIX3"
#define TYPE_PIIX4_PCI_DEVICE "piix4-isa"
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 5b867df299..c7e59249b6 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -35,7 +35,7 @@
#include "migration/vmstate.h"
#include "hw/acpi/acpi_aml_interface.h"
-static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq)
+static void piix3_set_irq_pic(PIIXState *piix3, int pic_irq)
{
qemu_set_irq(piix3->isa_irqs_in[pic_irq],
!!(piix3->pic_levels &
@@ -43,7 +43,7 @@ static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq)
(pic_irq * PIIX_NUM_PIRQS))));
}
-static void piix3_set_irq_level_internal(PIIX3State *piix3, int pirq, int level)
+static void piix3_set_irq_level_internal(PIIXState *piix3, int pirq, int level)
{
int pic_irq;
uint64_t mask;
@@ -58,7 +58,7 @@ static void piix3_set_irq_level_internal(PIIX3State *piix3, int pirq, int level)
piix3->pic_levels |= mask * !!level;
}
-static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level)
+static void piix3_set_irq_level(PIIXState *piix3, int pirq, int level)
{
int pic_irq;
@@ -74,13 +74,13 @@ static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level)
static void piix3_set_irq(void *opaque, int pirq, int level)
{
- PIIX3State *piix3 = opaque;
+ PIIXState *piix3 = opaque;
piix3_set_irq_level(piix3, pirq, level);
}
static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin)
{
- PIIX3State *piix3 = opaque;
+ PIIXState *piix3 = opaque;
int irq = piix3->dev.config[PIIX_PIRQCA + pin];
PCIINTxRoute route;
@@ -95,7 +95,7 @@ static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin)
}
/* irq routing is changed. so rebuild bitmap */
-static void piix3_update_irq_levels(PIIX3State *piix3)
+static void piix3_update_irq_levels(PIIXState *piix3)
{
PCIBus *bus = pci_get_bus(&piix3->dev);
int pirq;
@@ -111,7 +111,7 @@ static void piix3_write_config(PCIDevice *dev,
{
pci_default_write_config(dev, address, val, len);
if (ranges_overlap(address, len, PIIX_PIRQCA, 4)) {
- PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev);
+ PIIXState *piix3 = PIIX_PCI_DEVICE(dev);
int pic_irq;
pci_bus_fire_intx_routing_notifier(pci_get_bus(&piix3->dev));
@@ -124,7 +124,7 @@ static void piix3_write_config(PCIDevice *dev,
static void piix3_reset(DeviceState *dev)
{
- PIIX3State *d = PIIX3_PCI_DEVICE(dev);
+ PIIXState *d = PIIX_PCI_DEVICE(dev);
uint8_t *pci_conf = d->dev.config;
pci_conf[0x04] = 0x07; /* master, memory and I/O */
@@ -165,7 +165,7 @@ static void piix3_reset(DeviceState *dev)
static int piix3_post_load(void *opaque, int version_id)
{
- PIIX3State *piix3 = opaque;
+ PIIXState *piix3 = opaque;
int pirq;
/*
@@ -188,7 +188,7 @@ static int piix3_post_load(void *opaque, int version_id)
static int piix3_pre_save(void *opaque)
{
int i;
- PIIX3State *piix3 = opaque;
+ PIIXState *piix3 = opaque;
for (i = 0; i < ARRAY_SIZE(piix3->pci_irq_levels_vmstate); i++) {
piix3->pci_irq_levels_vmstate[i] =
@@ -200,7 +200,7 @@ static int piix3_pre_save(void *opaque)
static bool piix3_rcr_needed(void *opaque)
{
- PIIX3State *piix3 = opaque;
+ PIIXState *piix3 = opaque;
return (piix3->rcr != 0);
}
@@ -211,7 +211,7 @@ static const VMStateDescription vmstate_piix3_rcr = {
.minimum_version_id = 1,
.needed = piix3_rcr_needed,
.fields = (VMStateField[]) {
- VMSTATE_UINT8(rcr, PIIX3State),
+ VMSTATE_UINT8(rcr, PIIXState),
VMSTATE_END_OF_LIST()
}
};
@@ -223,8 +223,8 @@ static const VMStateDescription vmstate_piix3 = {
.post_load = piix3_post_load,
.pre_save = piix3_pre_save,
.fields = (VMStateField[]) {
- VMSTATE_PCI_DEVICE(dev, PIIX3State),
- VMSTATE_INT32_ARRAY_V(pci_irq_levels_vmstate, PIIX3State,
+ VMSTATE_PCI_DEVICE(dev, PIIXState),
+ VMSTATE_INT32_ARRAY_V(pci_irq_levels_vmstate, PIIXState,
PIIX_NUM_PIRQS, 3),
VMSTATE_END_OF_LIST()
},
@@ -237,7 +237,7 @@ static const VMStateDescription vmstate_piix3 = {
static void rcr_write(void *opaque, hwaddr addr, uint64_t val, unsigned len)
{
- PIIX3State *d = opaque;
+ PIIXState *d = opaque;
if (val & 4) {
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
@@ -248,7 +248,7 @@ static void rcr_write(void *opaque, hwaddr addr, uint64_t val, unsigned len)
static uint64_t rcr_read(void *opaque, hwaddr addr, unsigned len)
{
- PIIX3State *d = opaque;
+ PIIXState *d = opaque;
return d->rcr;
}
@@ -265,7 +265,7 @@ static const MemoryRegionOps rcr_ops = {
static void pci_piix3_realize(PCIDevice *dev, Error **errp)
{
- PIIX3State *d = PIIX3_PCI_DEVICE(dev);
+ PIIXState *d = PIIX_PCI_DEVICE(dev);
PCIBus *pci_bus = pci_get_bus(dev);
ISABus *isa_bus;
uint32_t irq;
@@ -345,7 +345,7 @@ static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
static void pci_piix3_init(Object *obj)
{
- PIIX3State *d = PIIX3_PCI_DEVICE(obj);
+ PIIXState *d = PIIX_PCI_DEVICE(obj);
qdev_init_gpio_out_named(DEVICE(obj), d->isa_irqs_in, "isa-irqs",
ISA_NUM_IRQS);
@@ -355,10 +355,10 @@ static void pci_piix3_init(Object *obj)
}
static Property pci_piix3_props[] = {
- DEFINE_PROP_UINT32("smb_io_base", PIIX3State, smb_io_base, 0),
- DEFINE_PROP_BOOL("has-acpi", PIIX3State, has_acpi, true),
- DEFINE_PROP_BOOL("has-usb", PIIX3State, has_usb, true),
- DEFINE_PROP_BOOL("smm-enabled", PIIX3State, smm_enabled, false),
+ DEFINE_PROP_UINT32("smb_io_base", PIIXState, smb_io_base, 0),
+ DEFINE_PROP_BOOL("has-acpi", PIIXState, has_acpi, true),
+ DEFINE_PROP_BOOL("has-usb", PIIXState, has_usb, true),
+ DEFINE_PROP_BOOL("smm-enabled", PIIXState, smm_enabled, false),
DEFINE_PROP_END_OF_LIST(),
};
@@ -386,10 +386,10 @@ static void pci_piix3_class_init(ObjectClass *klass, void *data)
adevc->build_dev_aml = build_pci_isa_aml;
}
-static const TypeInfo piix3_pci_type_info = {
- .name = TYPE_PIIX3_PCI_DEVICE,
+static const TypeInfo piix_pci_type_info = {
+ .name = TYPE_PIIX_PCI_DEVICE,
.parent = TYPE_PCI_DEVICE,
- .instance_size = sizeof(PIIX3State),
+ .instance_size = sizeof(PIIXState),
.instance_init = pci_piix3_init,
.abstract = true,
.class_init = pci_piix3_class_init,
@@ -403,7 +403,7 @@ static const TypeInfo piix3_pci_type_info = {
static void piix3_realize(PCIDevice *dev, Error **errp)
{
ERRP_GUARD();
- PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev);
+ PIIXState *piix3 = PIIX_PCI_DEVICE(dev);
PCIBus *pci_bus = pci_get_bus(dev);
pci_piix3_realize(dev, errp);
@@ -424,13 +424,13 @@ static void piix3_class_init(ObjectClass *klass, void *data)
static const TypeInfo piix3_info = {
.name = TYPE_PIIX3_DEVICE,
- .parent = TYPE_PIIX3_PCI_DEVICE,
+ .parent = TYPE_PIIX_PCI_DEVICE,
.class_init = piix3_class_init,
};
static void piix3_register_types(void)
{
- type_register_static(&piix3_pci_type_info);
+ type_register_static(&piix_pci_type_info);
type_register_static(&piix3_info);
}
--
MST
next prev parent reply other threads:[~2023-10-22 9:26 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-22 9:21 [PULL v3 00/62] virtio,pc,pci: features, cleanups Michael S. Tsirkin
2023-10-22 9:21 ` [PULL v3 01/62] vdpa: Use iovec for vhost_vdpa_net_cvq_add() Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 02/62] vdpa: Avoid using vhost_vdpa_net_load_*() outside vhost_vdpa_net_load() Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 03/62] vdpa: Check device ack in vhost_vdpa_net_load_rx_mode() Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 04/62] vdpa: Move vhost_svq_poll() to the caller of vhost_vdpa_net_cvq_add() Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 05/62] vdpa: Introduce cursors to vhost_vdpa_net_loadx() Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 06/62] vhost: Expose vhost_svq_available_slots() Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 07/62] vdpa: Send cvq state load commands in parallel Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 08/62] vhost-user: strip superfluous whitespace Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 09/62] vhost-user: tighten "reply_supported" scope in "set_vring_addr" Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 10/62] vhost-user: factor out "vhost_user_write_sync" Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 11/62] vhost-user: flatten "enforce_reply" into "vhost_user_write_sync" Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 12/62] vhost-user: hoist "write_sync", "get_features", "get_u64" Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 13/62] vhost-user: allow "vhost_set_vring" to wait for a reply Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 14/62] vhost-user: call VHOST_USER_SET_VRING_ENABLE synchronously Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 15/62] memory: initialize 'fv' in MemoryRegionCache to make Coverity happy Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 16/62] vhost-user: do not send RESET_OWNER on device reset Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 17/62] vhost-backend: remove vhost_kernel_reset_device() Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 18/62] virtio: call ->vhost_reset_device() during reset Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 19/62] hw/i386/acpi-build: Remove build-time assertion on PIIX/ICH9 reset registers being identical Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 20/62] timer/i8254: Fix one shot PIT mode Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 21/62] hw/display: fix memleak from virtio_add_resource Michael S. Tsirkin
2023-10-24 6:19 ` Michael Tokarev
2023-10-22 9:23 ` [PULL v3 22/62] hw/i386/pc: Merge two if statements into one Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 23/62] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 24/62] hw/i386/pc_piix: Assign PIIX3's ISA interrupts before its realize() Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 25/62] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 26/62] hw/i386/pc_piix: Wire PIIX3's ISA interrupts by new "isa-irqs" property Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 27/62] hw/i386/pc_piix: Remove redundant "piix3" variable Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 28/62] hw/isa/piix3: Rename "pic" attribute to "isa_irqs_in" Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 29/62] hw/i386/pc_q35: Wire ICH9 LPC function's interrupts before its realize() Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 30/62] hw/isa/piix3: Wire PIC IRQs to ISA bus in host device Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 31/62] hw/i386/pc: Wire RTC ISA IRQs in south bridges Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 32/62] hw/isa/piix3: Create IDE controller in host device Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 33/62] hw/isa/piix3: Create USB " Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 34/62] hw/isa/piix3: Create power management " Michael S. Tsirkin
2023-10-22 9:24 ` Michael S. Tsirkin [this message]
2023-10-22 9:24 ` [PULL v3 36/62] hw/isa/piix4: Remove unused inbound ISA interrupt lines Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 37/62] hw/isa/piix4: Rename "isa" attribute to "isa_irqs_in" Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 38/62] hw/isa/piix4: Rename reset control operations to match PIIX3 Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 39/62] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 40/62] hw/isa/piix3: Merge hw/isa/piix4.c Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 41/62] hw/isa/piix: Allow for optional PIC creation in PIIX3 Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 42/62] hw/isa/piix: Allow for optional PIT " Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 43/62] hw/isa/piix: Harmonize names of reset control memory regions Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 44/62] hw/isa/piix: Share PIIX3's base class with PIIX4 Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 45/62] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 46/62] hw/isa/piix: Rename functions to be shared for PCI interrupt triggering Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 47/62] hw/isa/piix: Reuse PIIX3's PCI interrupt triggering in PIIX4 Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 48/62] hw/isa/piix: Resolve duplicate code regarding PCI interrupt wiring Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 49/62] hw/isa/piix: Implement multi-process QEMU support also for PIIX4 Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 50/62] hw/i386/pc_piix: Make PIIX4 south bridge usable in PC machine Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 51/62] vhost-user-common: send get_inflight_fd once Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 52/62] vhost: move and rename the conn retry times Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 53/62] vhost-user-scsi: support reconnect to backend Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 54/62] vhost-user-scsi: start vhost when guest kicks Michael S. Tsirkin
2023-10-22 9:26 ` [PULL v3 55/62] vhost-user: fix lost reconnect Michael S. Tsirkin
2023-10-22 9:26 ` [PULL v3 56/62] hw/i386/cxl: ensure maxram is greater than ram size for calculating cxl range Michael S. Tsirkin
2023-10-22 9:26 ` [PULL v3 57/62] tests/acpi: Allow update of DSDT.cxl Michael S. Tsirkin
2023-10-22 9:26 ` [PULL v3 58/62] hw/cxl: Add QTG _DSM support for ACPI0017 device Michael S. Tsirkin
2023-10-22 9:26 ` [PULL v3 59/62] tests/acpi: Update DSDT.cxl with QTG DSM Michael S. Tsirkin
2023-10-22 9:26 ` [PULL v3 60/62] vhost-user: Fix protocol feature bit conflict Michael S. Tsirkin
2023-10-22 9:26 ` [PULL v3 61/62] MAINTAINERS: Add include/hw/intc/i8259.h to the PC chip section Michael S. Tsirkin
2023-10-22 9:26 ` [PULL v3 62/62] intel-iommu: Report interrupt remapping faults, fix return value Michael S. Tsirkin
2023-10-24 1:15 ` [PULL v3 00/62] virtio,pc,pci: features, cleanups Stefan Hajnoczi
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