Re: [PATCH v3 1/6] hw/gpio/aspeed: Fix coding style

["Cédric Le Goater" <clg@kaod.org>]

On 9/26/24 09:45, Jamin Lin wrote:
> Fix coding style issues from checkpatch.pl
> 
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>


Reviewed-by: Cédric Le Goater <clg@redhat.com>

Thanks,

C.


> ---
>   hw/gpio/aspeed_gpio.c         | 6 +++---
>   include/hw/gpio/aspeed_gpio.h | 2 +-
>   2 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c
> index 71756664dd..00fb72a509 100644
> --- a/hw/gpio/aspeed_gpio.c
> +++ b/hw/gpio/aspeed_gpio.c
> @@ -340,7 +340,8 @@ static void aspeed_gpio_set_pin_level(AspeedGPIOState *s, uint32_t set_idx,
>           value &= ~pin_mask;
>       }
>   
> -    aspeed_gpio_update(s, &s->sets[set_idx], value, ~s->sets[set_idx].direction);
> +    aspeed_gpio_update(s, &s->sets[set_idx], value,
> +                       ~s->sets[set_idx].direction);
>   }
>   
>   /*
> @@ -629,7 +630,6 @@ static uint64_t aspeed_gpio_read(void *opaque, hwaddr offset, uint32_t size)
>   static void aspeed_gpio_write_index_mode(void *opaque, hwaddr offset,
>                                                   uint64_t data, uint32_t size)
>   {
> -
>       AspeedGPIOState *s = ASPEED_GPIO(opaque);
>       AspeedGPIOClass *agc = ASPEED_GPIO_GET_CLASS(s);
>       const GPIOSetProperties *props;
> @@ -963,7 +963,7 @@ static void aspeed_gpio_set_pin(Object *obj, Visitor *v, const char *name,
>       aspeed_gpio_set_pin_level(s, set_idx, pin, level);
>   }
>   
> -/****************** Setup functions ******************/
> +/* Setup functions */
>   static const GPIOSetProperties ast2400_set_props[ASPEED_GPIO_MAX_NR_SETS] = {
>       [0] = {0xffffffff,  0xffffffff,  {"A", "B", "C", "D"} },
>       [1] = {0xffffffff,  0xffffffff,  {"E", "F", "G", "H"} },
> diff --git a/include/hw/gpio/aspeed_gpio.h b/include/hw/gpio/aspeed_gpio.h
> index 90a12ae318..39febda9ea 100644
> --- a/include/hw/gpio/aspeed_gpio.h
> +++ b/include/hw/gpio/aspeed_gpio.h
> @@ -88,7 +88,7 @@ struct AspeedGPIOState {
>       qemu_irq irq;
>       qemu_irq gpios[ASPEED_GPIO_MAX_NR_SETS][ASPEED_GPIOS_PER_SET];
>   
> -/* Parallel GPIO Registers */
> +    /* Parallel GPIO Registers */
>       uint32_t debounce_regs[ASPEED_GPIO_NR_DEBOUNCE_REGS];
>       struct GPIOSets {
>           uint32_t data_value; /* Reflects pin values */