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From: Paolo Bonzini <pbonzini@redhat.com>
Message-ID: <97d6366b-df95-cf00-d652-3176547ae5ca@redhat.com>
Date: Fri, 28 Dec 2018 15:25:10 +0100
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Subject: Re: [Qemu-devel] [PATCH 2/4] Add CET SHSTK and IBT CPUID
 feature-word definitions.
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To: Yang Weijiang <weijiang.yang@intel.com>, qemu-devel@nongnu.org, rkrcmar@redhat.com, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, mst@redhat.com, yu-cheng.yu@intel.com, yi.z.zhang@intel.com, hjl.tools@gmail.com
Cc: Zhang Yi <yi.z.zhang@linux.intel.com>

On 26/12/18 09:25, Yang Weijiang wrote:
> @@ -1233,6 +1252,14 @@ static const ExtSaveArea x86_ext_save_areas[] =3D=
 {
>            { .feature =3D FEAT_7_0_ECX, .bits =3D CPUID_7_0_ECX_PKU,
>              .offset =3D offsetof(X86XSaveArea, pkru_state),
>              .size =3D sizeof(XSavePKRU) },
> +    [XSTATE_CET_U_BIT] =3D {
> +            .feature =3D FEAT_7_0_ECX, .bits =3D CPUID_7_0_ECX_CET_SHS=
TK,
> +            .offset =3D offsetof(X86XSaveArea, cet_u),

These offsets are incorrect, since supervisor states are only stored in
the compacted format.  In fact, in patch 4, supervisor states should
return 0 in CPUID(EAX=3D0Dh,ECX=3Dn).EBX.

You can use offset =3D=3D 0 to distinguish supervisor and user states, so
that supervisor states are skipped in xsave_area_size and x86_cpu_reset.

Thanks,

Paolo

> +            .size =3D sizeof(XSaveCETU) },
> +    [XSTATE_CET_S_BIT] =3D {
> +            .feature =3D FEAT_7_0_ECX, .bits =3D CPUID_7_0_ECX_CET_SHS=
TK,
> +            .offset =3D offsetof(X86XSaveArea, cet_s),
> +            .size =3D sizeof(XSaveCETS) },
>  };
> =20
>  static uint32_t xsave_area_size(uint64_t mask)