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Fri, 05 Sep 2025 23:37:13 -0700 (PDT) Received: from [192.168.104.251] ([217.65.133.19]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45dd60b381csm61111985e9.17.2025.09.05.23.37.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 05 Sep 2025 23:37:12 -0700 (PDT) Message-ID: <9803467a-dacd-43ba-901a-6c0d4ea72615@linaro.org> Date: Sat, 6 Sep 2025 08:16:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 04/11] target/riscv: Record misa_ext in TCGTBCPUState.cs_base Content-Language: en-US To: Richard Henderson , qemu-devel@nongnu.org Cc: alex.bennee@linaro.org, philmd@linaro.org References: <20250906051820.160432-1-richard.henderson@linaro.org> <20250906051820.160432-5-richard.henderson@linaro.org> From: Pierrick Bouvier In-Reply-To: <20250906051820.160432-5-richard.henderson@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=pierrick.bouvier@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 2025-09-06 07:18, Richard Henderson wrote: > The tb_flush within write_misa was incorrect. It assumed > that we could adjust the ISA of the current processor and > discard all TB and all would be well. But MISA is per vcpu, > so globally flushing TB does not mean that the TB matches > the MISA of any given vcpu. > > By recording misa in the tb state, we ensure that the code > generated matches the vcpu. > > Signed-off-by: Richard Henderson > --- > target/riscv/csr.c | 3 --- > target/riscv/tcg/tcg-cpu.c | 3 ++- > 2 files changed, 2 insertions(+), 4 deletions(-) Reviewed-by: Pierrick Bouvier