From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PATCH for-8.0 25/29] tcg/i386: Mark Win64 call-saved vector regs as reserved
Date: Mon, 21 Nov 2022 17:28:48 +0100 [thread overview]
Message-ID: <981f9ebb-8859-0010-5399-66175cbdd380@linaro.org> (raw)
In-Reply-To: <20221118094754.242910-26-richard.henderson@linaro.org>
On 18/11/22 10:47, Richard Henderson wrote:
> While we do not include these in tcg_target_reg_alloc_order,
> and therefore they ought never be allocated, it seems safer
> to mark them reserved as well.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> tcg/i386/tcg-target.c.inc | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
> index e38f08bd12..e04818eef6 100644
> --- a/tcg/i386/tcg-target.c.inc
> +++ b/tcg/i386/tcg-target.c.inc
> @@ -4224,6 +4224,19 @@ static void tcg_target_init(TCGContext *s)
>
> s->reserved_regs = 0;
> tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
> +#ifdef _WIN64
> + /* These are call saved, and not we don't save them, so don't use them. */
s/not//?
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> + tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM6);
> + tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM7);
> + tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM8);
> + tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM9);
> + tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM10);
> + tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM11);
> + tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM12);
> + tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM13);
> + tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM14);
> + tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM15);
> +#endif
> }
>
> typedef struct {
next prev parent reply other threads:[~2022-11-21 16:29 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-18 9:47 [PATCH for-8.0 00/29] tcg: Improve atomicity support Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 01/29] include/qemu/cpuid: Introduce xgetbv_low Richard Henderson
2022-11-21 12:15 ` Philippe Mathieu-Daudé
2022-11-18 9:47 ` [PATCH for-8.0 02/29] include/exec/memop: Add bits describing atomicity Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 03/29] accel/tcg: Add cpu_in_serial_context Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 04/29] accel/tcg: Introduce tlb_read_idx Richard Henderson
2022-11-21 12:25 ` Philippe Mathieu-Daudé
2022-11-18 9:47 ` [PATCH for-8.0 05/29] accel/tcg: Reorg system mode load helpers Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 06/29] accel/tcg: Reorg system mode store helpers Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 07/29] accel/tcg: Honor atomicity of loads Richard Henderson
2022-11-22 14:35 ` Peter Maydell
2022-11-22 18:04 ` Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 08/29] accel/tcg: Honor atomicity of stores Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 09/29] tcg/tci: Use cpu_{ld,st}_mmu Richard Henderson
2022-11-21 12:40 ` Philippe Mathieu-Daudé
2022-11-18 9:47 ` [PATCH for-8.0 10/29] tcg: Unify helper_{be,le}_{ld,st}* Richard Henderson
2022-11-21 12:48 ` Philippe Mathieu-Daudé
2022-11-18 9:47 ` [PATCH for-8.0 11/29] accel/tcg: Implement helper_{ld, st}*_mmu for user-only Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 12/29] tcg: Add 128-bit guest memory primitives Richard Henderson
2022-11-22 3:30 ` Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 13/29] meson: Detect atomic128 support with optimization Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 14/29] tcg/i386: Add have_atomic16 Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 15/29] include/qemu/int128: Add vector type to Int128Alias Richard Henderson
2022-11-21 23:45 ` Philippe Mathieu-Daudé
2022-11-22 18:21 ` Philippe Mathieu-Daudé
2022-11-22 18:31 ` Philippe Mathieu-Daudé
2022-11-18 9:47 ` [PATCH for-8.0 16/29] accel/tcg: Use have_atomic16 in ldst_atomicity.c.inc Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 17/29] tcg/aarch64: Add have_lse, have_lse2 Richard Henderson
2022-11-21 23:10 ` Philippe Mathieu-Daudé
2022-11-21 23:14 ` Philippe Mathieu-Daudé
2022-11-18 9:47 ` [PATCH for-8.0 18/29] accel/tcg: Add aarch64 specific support in ldst_atomicity Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 19/29] tcg: Introduce TCG_OPF_TYPE_MASK Richard Henderson
2022-11-21 16:12 ` Philippe Mathieu-Daudé
2022-11-18 9:47 ` [PATCH for-8.0 20/29] tcg: Add INDEX_op_qemu_{ld,st}_i128 Richard Henderson
2022-11-21 22:59 ` Philippe Mathieu-Daudé
2022-11-18 9:47 ` [PATCH for-8.0 21/29] tcg/i386: Introduce tcg_out_mov2 Richard Henderson
2022-11-21 16:21 ` Philippe Mathieu-Daudé
2022-11-18 9:47 ` [PATCH for-8.0 22/29] tcg/i386: Introduce tcg_out_testi Richard Henderson
2022-11-21 16:22 ` Philippe Mathieu-Daudé
2022-11-18 9:47 ` [PATCH for-8.0 23/29] tcg/i386: Use full load/store helpers in user-only mode Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 24/29] tcg/i386: Replace is64 with type in qemu_ld/st routines Richard Henderson
2022-11-21 16:27 ` Philippe Mathieu-Daudé
2022-11-18 9:47 ` [PATCH for-8.0 25/29] tcg/i386: Mark Win64 call-saved vector regs as reserved Richard Henderson
2022-11-21 16:28 ` Philippe Mathieu-Daudé [this message]
2022-11-18 9:47 ` [PATCH for-8.0 26/29] tcg/i386: Examine MemOp for atomicity and alignment Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 27/29] tcg/i386: Support 128-bit load/store with have_atomic16 Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 28/29] tcg/i386: Add vex_v argument to tcg_out_vex_modrm_pool Richard Henderson
2022-11-18 9:47 ` [PATCH for-8.0 29/29] tcg/i386: Honor 64-bit atomicity in 32-bit mode Richard Henderson
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