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[83.21.94.247]) by smtp.gmail.com with ESMTPSA id m25-20020a195219000000b004fe119b0105sm269684lfb.272.2023.09.14.06.15.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Sep 2023 06:15:50 -0700 (PDT) Message-ID: <986148e3-2830-4333-bfd7-29de9fa2dab8@linaro.org> Date: Thu, 14 Sep 2023 15:15:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 0/3] Refactor PPI logic/definitions for virt/sbsa-ref Content-Language: pl-PL, en-GB, en-HK To: Leif Lindholm , qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Radoslaw Biernacki , Peter Maydell References: <20230914120124.55410-1-quic_llindhol@quicinc.com> From: Marcin Juszkiewicz Organization: Linaro In-Reply-To: <20230914120124.55410-1-quic_llindhol@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::129; envelope-from=marcin.juszkiewicz@linaro.org; helo=mail-lf1-x129.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org W dniu 14.09.2023 o 14:01, Leif Lindholm pisze: > While reviewing Marcin's patch this morning, cross referencing different > specifications and looking at various places around the source code in > order to convinced myself he really hadn't missed something out (the > existing plumbing made it *so* clean to add), my brain broke slightly > at keeping track of PPIs/INTIDs between the various sources. > > Moreover, I found the PPI() macro in virt.h to be doing the exact > opposite of what I would have expected it to (it converts a PPI to an > INTID rather than the other way around). > > So I refactored stuff so that: > - PPIs defined by BSA are moved to a (new) common header. > - The _IRQ definitions for those PPIs refer to the INTIDs. > - sbsa-ref and virt both use these definitions. > > This change does objectively add a bit more noise to the code, since it > means more locations need to use the PPI macro than before, but it felt > like a readability improvement to me. I like how code looks after those changes. No more adding 16 to irq numbers to fit them into BSA spec numbers is nice to have. Will rebase my "non-secure EL2 virtual timer" patch on top of it. > Not even compilation tested, just the least confusing way of asking > whether the change could be accepted at all. There are build warnings and final binary segfaults on start. -------------------------------------------- [1799/2931] Compiling C object libqemu-aarch64-softmmu.fa.p/hw_arm_sbsa-ref.c.o ../hw/arm/sbsa-ref.c: In function ‘create_gic’: ../hw/arm/sbsa-ref.c:496:13: warning: assignment to ‘int’ from ‘qemu_irq’ {aka ‘struct IRQState *’} makes integer from pointer without a cast [-Wint-conversion] 496 | irq = qdev_get_gpio_in(sms->gic, | ^ ../hw/arm/sbsa-ref.c:499:37: warning: passing argument 4 of ‘qdev_connect_gpio_out_named’ makes pointer from integer without a cast [-Wint-conversion] 499 | irq); | ^~~ | | | int In file included from /home/marcin/devel/linaro/sbsa-qemu/code/qemu/include/hw/core/cpu.h:23, from ../target/arm/cpu-qom.h:23, from ../target/arm/cpu.h:26, from /home/marcin/devel/linaro/sbsa-qemu/code/qemu/include/sysemu/kvm.h:244, from ../hw/arm/sbsa-ref.c:27: /home/marcin/devel/linaro/sbsa-qemu/code/qemu/include/hw/qdev-core.h:699:43: note: expected ‘qemu_irq’ {aka ‘struct IRQState *’} but argument is of type ‘int’ 699 | qemu_irq input_pin); | ~~~~~~~~~^~~~~~~~~ ../hw/arm/sbsa-ref.c:501:13: warning: assignment to ‘int’ from ‘qemu_irq’ {aka ‘struct IRQState *’} makes integer from pointer without a cast [-Wint-conversion] 501 | irq = qdev_get_gpio_in(sms->gic, | ^ ../hw/arm/sbsa-ref.c:503:65: warning: passing argument 4 of ‘qdev_connect_gpio_out_named’ makes pointer from integer without a cast [-Wint-conversion] 503 | qdev_connect_gpio_out_named(cpudev, "pmu-interrupt", 0, irq); | ^~~ | | | int /home/marcin/devel/linaro/sbsa-qemu/code/qemu/include/hw/qdev-core.h:699:43: note: expected ‘qemu_irq’ {aka ‘struct IRQState *’} but argument is of type ‘int’ 699 | qemu_irq input_pin); | ~~~~~~~~~^~~~~~~~~ --------------------------------------------