From: Djordje Todorovic <Djordje.Todorovic@htecgroup.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>,
"cfu@mips.com" <cfu@mips.com>, "mst@redhat.com" <mst@redhat.com>,
"marcel.apfelbaum@gmail.com" <marcel.apfelbaum@gmail.com>,
"dbarboza@ventanamicro.com" <dbarboza@ventanamicro.com>,
"alistair23@gmail.com" <alistair23@gmail.com>,
"thuth@redhat.com" <thuth@redhat.com>
Subject: Re: [PATCH v14 00/14] riscv: Add support for MIPS P8700 CPU
Date: Wed, 3 Dec 2025 14:31:23 +0000 [thread overview]
Message-ID: <9893e4bd-a0b6-491f-95dd-6a23e102a685@htecgroup.com> (raw)
In-Reply-To: <88c37ed0-2e1f-4a6d-8032-f153309eeaac@linaro.org>
Hi,
Thanks a lot for the feedback!
Djordje
On 3. 12. 25. 12:53, Philippe Mathieu-Daudé wrote:
> CAUTION: This email originated from outside of the organization. Do
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>
> Hi,
>
> On 3/12/25 12:24, Djordje Todorovic wrote:
>> Hi all,
>>
>> What is the status for this? :)
>
> Series looks OK for being queued by Alistair (RISC-V tree).
> QEMU tree is now freezed until the next release (v10.2.0).
> We now all wait the tree to re-open for development...
>
> Regards,
>
> Phil.
>
>>
>> Best regards,
>>
>> Djordje
prev parent reply other threads:[~2025-12-03 14:32 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-18 8:58 [PATCH v14 00/14] riscv: Add support for MIPS P8700 CPU Djordje Todorovic
2025-11-18 8:58 ` [PATCH v14 01/14] hw/intc: Allow gaps in hartids for aclint and aplic Djordje Todorovic
2025-11-18 8:58 ` [PATCH v14 02/14] target/riscv: Add cpu_set_exception_base Djordje Todorovic
2025-11-18 8:58 ` [PATCH v14 03/14] target/riscv: Add MIPS P8700 CPU Djordje Todorovic
2025-11-18 8:58 ` [PATCH v14 04/14] target/riscv: Add MIPS P8700 CSRs Djordje Todorovic
2025-11-18 8:58 ` [PATCH v14 06/14] target/riscv: Add mips.pref instruction Djordje Todorovic
2025-11-18 8:58 ` [PATCH v14 05/14] target/riscv: Add mips.ccmov instruction Djordje Todorovic
2025-11-18 8:58 ` [PATCH v14 08/14] hw/misc: Add RISC-V CMGCR device implementation Djordje Todorovic
2025-11-18 8:58 ` [PATCH v14 07/14] target/riscv: Add Xmipslsp instructions Djordje Todorovic
2025-11-18 8:58 ` [PATCH v14 09/14] hw/misc: Add RISC-V CPC device implementation Djordje Todorovic
2025-11-18 8:58 ` [PATCH v14 11/14] hw/riscv: Add support for MIPS Boston-aia board mode Djordje Todorovic
2025-11-18 8:58 ` [PATCH v14 10/14] hw/riscv: Add support for RISCV CPS Djordje Todorovic
2025-11-18 8:58 ` [PATCH v14 13/14] test/functional: Add test for boston-aia board Djordje Todorovic
2025-11-18 8:58 ` [PATCH v14 12/14] riscv/boston-aia: Add an e1000e NIC in slot 0 func 1 Djordje Todorovic
2025-11-18 8:58 ` [PATCH v14 14/14] scripts/checkpatch: Check DEVICE_NATIVE_ENDIAN Djordje Todorovic
2025-11-18 11:19 ` Philippe Mathieu-Daudé
2025-12-03 11:24 ` [PATCH v14 00/14] riscv: Add support for MIPS P8700 CPU Djordje Todorovic
2025-12-03 11:53 ` Philippe Mathieu-Daudé
2025-12-03 14:31 ` Djordje Todorovic [this message]
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