qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Schwarz, Konrad" <konrad.schwarz@siemens.com>
To: Alistair Francis <alistair23@gmail.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Bin Meng <bin.meng@windriver.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
Subject: RE: [PATCH v2 3/5] RISC-V: 'info gmem' to show hypervisor guest -> physical address translations
Date: Wed, 5 Jan 2022 13:09:53 +0000	[thread overview]
Message-ID: <98a40a89c44c4a089ea3bb6dc4f7f29f@siemens.com> (raw)
In-Reply-To: <CAKmqyKNq6ewguvDAH_v=4N5qPQAMgZSJNU8pJRC91X-Sh_WvXA@mail.gmail.com>

> -----Original Message-----
> From: Alistair Francis <alistair23@gmail.com>
> Sent: Tuesday, January 4, 2022 23:03
> On Wed, Jan 5, 2022 at 1:55 AM Konrad Schwarz
> <konrad.schwarz@siemens.com> wrote:
> >
> > This is analog to the existing 'info mem' command and is implemented
> > using the same machinery.

> >  hmp-commands-info.hx         |  16 +++++
> >  include/monitor/hmp-target.h |   2 +
> >  target/riscv/monitor.c       | 135 +++++++++++++++++++++++++----------
> >  3 files changed, 117 insertions(+), 36 deletions(-)
> >
> > diff --git a/hmp-commands-info.hx b/hmp-commands-info.hx
> > index 407a1da800..fa519f0129 100644
> > --- a/hmp-commands-info.hx
> > +++ b/hmp-commands-info.hx
> > @@ -237,6 +237,22 @@ SRST
> >      Show the active virtual memory mappings.
> >  ERST
> >
> > +#if defined TARGET_RISCV
> > +    {
> > +        .name       = "gmem",
> > +        .args_type  = "",
> > +        .params     = "",
> > +        .help       = "show the hypervisor guest's physical address"
> > +                   " translation",
> > +        .cmd        = hmp_info_gmem,
> > +    },
> > +#endif
> 
> I don't think we want RISC-V specific commands. Could we not just
> extend `info mem` instead?

Considering that the similar commands `info tlb' and `info mem'
are target dependent (i.e. specific to I386, SH4, SPARC,
PCC, XTENSA and M68K, respectively to I386 and RISC-V),
I honestly do not see a problem here.

Obviously, other architectures are free to add their own implementation
of the `info gmem' functionality, so the list of architectures
supporting this command might grow in future.  The command itself
is not specific to RISC-V.

PS: I will be taking your other points to heart on the re-roll,
I just wanted to get this out of the way before attempting it.

Regards,
Konrad

  reply	other threads:[~2022-01-05 13:27 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-02 16:06 [PATCH v1 0/5] Improve RISC-V debugging support Konrad Schwarz
2022-01-02 16:06 ` [PATCH v1 1/5] RISC-V: larger and more consistent register set for 'info registers' Konrad Schwarz
2022-01-02 16:06 ` [PATCH v1 2/5] RISC-V: monitor's print register functionality Konrad Schwarz
2022-01-02 16:06 ` [PATCH v1 3/5] RISC-V: 'info gmem' to show hypervisor guest -> physical address translations Konrad Schwarz
2022-01-02 16:06 ` [PATCH v1 4/5] RISC-V: Typed CSRs in gdbserver Konrad Schwarz
2022-01-03 12:54   ` Ralf Ramsauer
2022-01-04 15:51     ` [PATCH v2 0/5] Improve RISC-V debugging support Konrad Schwarz
2022-01-04 15:51       ` [PATCH v2 1/5] RISC-V: larger and more consistent register set for 'info registers' Konrad Schwarz
2022-01-04 20:57         ` Richard Henderson
2022-01-05 12:38           ` Schwarz, Konrad
2022-01-05 18:21             ` Alex Bennée
2022-01-04 15:51       ` [PATCH v2 2/5] RISC-V: monitor's print register functionality Konrad Schwarz
2022-01-04 15:51       ` [PATCH v2 3/5] RISC-V: 'info gmem' to show hypervisor guest -> physical address translations Konrad Schwarz
2022-01-04 22:03         ` Alistair Francis
2022-01-05 13:09           ` Schwarz, Konrad [this message]
2022-01-04 15:51       ` [PATCH v2 4/5] RISC-V: Typed CSRs in gdbserver Konrad Schwarz
2022-01-04 22:11         ` Alistair Francis
2022-01-05 13:25           ` Schwarz, Konrad
2022-01-04 23:01         ` Richard Henderson
2022-01-05 14:04           ` Schwarz, Konrad
2022-01-05 20:20             ` Richard Henderson
2022-01-05 18:43         ` Alex Bennée
2022-01-05 19:24           ` Schwarz, Konrad
2022-01-05 19:34             ` Alex Bennée
2022-01-04 15:51       ` [PATCH v2 5/5] RISC-V: Add `v' (virtualization mode) bit to the `priv' virtual debug register Konrad Schwarz
2022-01-02 16:06 ` [PATCH v1 " Konrad Schwarz

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=98a40a89c44c4a089ea3bb6dc4f7f29f@siemens.com \
    --to=konrad.schwarz@siemens.com \
    --cc=alistair.francis@wdc.com \
    --cc=alistair23@gmail.com \
    --cc=bin.meng@windriver.com \
    --cc=palmer@dabbelt.com \
    --cc=qemu-devel@nongnu.org \
    --cc=ralf.ramsauer@oth-regensburg.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).