From: Richard Henderson <richard.henderson@linaro.org>
To: Warner Losh <imp@bsdimp.com>
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
"QEMU Developers" <qemu-devel@nongnu.org>,
"Laurent Vivier" <laurent@vivier.eu>
Subject: Re: [PATCH v5 12/67] linux-user/host/aarch64: Populate host_signal.h
Date: Fri, 15 Oct 2021 12:49:49 -0700 [thread overview]
Message-ID: <9974cb1f-ce49-b858-fbc8-6d4928a4e7d1@linaro.org> (raw)
In-Reply-To: <CANCZdfroR3PQUxDZ9wC5VgdYD9D1ay-cZ7ke3Ts2f2Xg803LSQ@mail.gmail.com>
On 10/15/21 11:30 AM, Warner Losh wrote:
> + /*
> + * Fall back to parsing instructions; will only be needed
> + * for really ancient (pre-3.16) kernels.
> + */
> + insn = *(uint32_t *)host_signal_pc(uc);
> +
> + return (insn & 0xbfff0000) == 0x0c000000 /* C3.3.1 */
> + || (insn & 0xbfe00000) == 0x0c800000 /* C3.3.2 */
> + || (insn & 0xbfdf0000) == 0x0d000000 /* C3.3.3 */
> + || (insn & 0xbfc00000) == 0x0d800000 /* C3.3.4 */
> + || (insn & 0x3f400000) == 0x08000000 /* C3.3.6 */
> + || (insn & 0x3bc00000) == 0x39000000 /* C3.3.13 */
> + || (insn & 0x3fc00000) == 0x3d800000 /* ... 128bit */
> + /* Ignore bits 10, 11 & 21, controlling indexing. */
> + || (insn & 0x3bc00000) == 0x38000000 /* C3.3.8-12 */
> + || (insn & 0x3fe00000) == 0x3c800000 /* ... 128bit */
> + /* Ignore bits 23 & 24, controlling indexing. */
> + || (insn & 0x3a400000) == 0x28000000; /* C3.3.7,14-16 */
> +}
Oh, Warner, I was thinking about your query about sharing the instruction parsing code
between *-user.
I was thinking that we should have, under e.g. user-only/, a library of stuff that could
be referenced by *-user. One of these would be a simpler interface like
bool host_is_write_insn_at(void *pc);
We can hammer out details on that as you discover what you need in bsd-user.
r~
next prev parent reply other threads:[~2021-10-15 19:51 UTC|newest]
Thread overview: 101+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-15 4:09 [PATCH v5 00/67] user-only: Cleanup SIGSEGV and SIGBUS handling Richard Henderson
2021-10-15 4:09 ` [PATCH v5 01/67] accel/tcg: Split out adjust_signal_pc Richard Henderson
2021-10-15 18:18 ` Warner Losh
2021-10-15 4:09 ` [PATCH v5 02/67] accel/tcg: Move clear_helper_retaddr to cpu loop Richard Henderson
2021-10-15 4:09 ` [PATCH v5 03/67] accel/tcg: Split out handle_sigsegv_accerr_write Richard Henderson
2021-10-15 18:19 ` Warner Losh
2021-10-15 4:09 ` [PATCH v5 04/67] accel/tcg: Fold cpu_exit_tb_from_sighandler into caller Richard Henderson
2021-10-15 18:20 ` Warner Losh
2021-10-15 4:09 ` [PATCH v5 05/67] configure: Merge riscv32 and riscv64 host architectures Richard Henderson
2021-10-15 18:21 ` Warner Losh
2021-10-15 4:09 ` [PATCH v5 06/67] linux-user: Reorg handling for SIGSEGV Richard Henderson
2021-10-15 4:09 ` [PATCH v5 07/67] linux-user/host/x86: Populate host_signal.h Richard Henderson
2021-10-15 18:26 ` Warner Losh
2021-10-15 4:09 ` [PATCH v5 08/67] linux-user/host/ppc: " Richard Henderson
2021-10-15 4:09 ` [PATCH v5 09/67] linux-user/host/alpha: " Richard Henderson
2021-10-15 4:09 ` [PATCH v5 10/67] linux-user/host/sparc: " Richard Henderson
2021-10-15 18:30 ` Warner Losh
2021-10-15 4:09 ` [PATCH v5 11/67] linux-user/host/arm: " Richard Henderson
2021-10-15 18:30 ` Warner Losh
2021-10-15 4:09 ` [PATCH v5 12/67] linux-user/host/aarch64: " Richard Henderson
2021-10-15 18:30 ` Warner Losh
2021-10-15 19:49 ` Richard Henderson [this message]
2021-10-15 4:09 ` [PATCH v5 13/67] linux-user/host/s390: " Richard Henderson
2021-10-15 4:10 ` [PATCH v5 14/67] linux-user/host/mips: " Richard Henderson
2021-10-15 18:31 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 15/67] linux-user/host/riscv: " Richard Henderson
2021-10-15 18:32 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 16/67] target/arm: Fixup comment re handle_cpu_signal Richard Henderson
2021-10-15 18:32 ` Warner Losh
2021-10-29 23:27 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 17/67] linux-user/host/riscv: Improve host_signal_write Richard Henderson
2021-10-15 4:10 ` [PATCH v5 18/67] linux-user/signal: Drop HOST_SIGNAL_PLACEHOLDER Richard Henderson
2021-10-15 4:10 ` [PATCH v5 19/67] hw/core: Add TCGCPUOps.record_sigsegv Richard Henderson
2021-10-15 4:10 ` [PATCH v5 20/67] linux-user: Add cpu_loop_exit_sigsegv Richard Henderson
2021-10-15 4:10 ` [PATCH v5 21/67] target/alpha: Implement alpha_cpu_record_sigsegv Richard Henderson
2021-10-15 4:10 ` [PATCH v5 22/67] target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup Richard Henderson
2021-10-15 18:34 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 23/67] target/arm: Implement arm_cpu_record_sigsegv Richard Henderson
2021-10-15 18:35 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 24/67] target/cris: Make cris_cpu_tlb_fill sysemu only Richard Henderson
2021-10-15 4:10 ` [PATCH v5 25/67] target/hexagon: Remove hexagon_cpu_tlb_fill Richard Henderson
2021-10-15 4:10 ` [PATCH v5 26/67] target/hppa: Make hppa_cpu_tlb_fill sysemu only Richard Henderson
2021-10-15 4:10 ` [PATCH v5 27/67] target/i386: Implement x86_cpu_record_sigsegv Richard Henderson
2021-10-15 4:10 ` [PATCH v5 28/67] target/m68k: Make m68k_cpu_tlb_fill sysemu only Richard Henderson
2021-10-15 4:10 ` [PATCH v5 29/67] target/microblaze: Make mb_cpu_tlb_fill " Richard Henderson
2021-10-15 4:10 ` [PATCH v5 30/67] target/mips: Make mips_cpu_tlb_fill " Richard Henderson
2021-10-15 18:40 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 31/67] target/nios2: Implement nios2_cpu_record_sigsegv Richard Henderson
2021-10-15 4:10 ` [PATCH v5 32/67] linux-user/openrisc: Adjust signal for EXCP_RANGE, EXCP_FPE Richard Henderson
2021-10-15 4:10 ` [PATCH v5 33/67] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only Richard Henderson
2021-10-15 4:10 ` [PATCH v5 34/67] target/ppc: Implement ppc_cpu_record_sigsegv Richard Henderson
2021-10-15 18:45 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 35/67] target/riscv: Make riscv_cpu_tlb_fill sysemu only Richard Henderson
2021-10-15 18:45 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 36/67] target/s390x: Use probe_access_flags in s390_probe_access Richard Henderson
2021-10-15 4:10 ` [PATCH v5 37/67] target/s390x: Implement s390_cpu_record_sigsegv Richard Henderson
2021-10-15 4:10 ` [PATCH v5 38/67] target/sh4: Make sh4_cpu_tlb_fill sysemu only Richard Henderson
2021-10-15 4:10 ` [PATCH v5 39/67] target/sparc: Make sparc_cpu_tlb_fill " Richard Henderson
2021-10-15 4:10 ` [PATCH v5 40/67] target/xtensa: Make xtensa_cpu_tlb_fill " Richard Henderson
2021-10-15 4:10 ` [PATCH v5 41/67] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu Richard Henderson
2021-10-15 4:10 ` [PATCH v5 42/67] Revert "cpu: Move cpu_common_props to hw/core/cpu.c" Richard Henderson
2021-10-15 4:10 ` [PATCH v5 43/67] hw/core: Add TCGCPUOps.record_sigbus Richard Henderson
2021-10-15 18:47 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 44/67] linux-user: Add cpu_loop_exit_sigbus Richard Henderson
2021-10-15 18:49 ` Warner Losh
2021-10-29 23:35 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 45/67] target/alpha: Implement alpha_cpu_record_sigbus Richard Henderson
2021-10-15 4:10 ` [PATCH v5 46/67] target/arm: Implement arm_cpu_record_sigbus Richard Henderson
2021-10-15 19:05 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 47/67] linux-user/hppa: Remove EXCP_UNALIGN handling Richard Henderson
2021-10-15 4:10 ` [PATCH v5 48/67] target/microblaze: Do not set MO_ALIGN for user-only Richard Henderson
2021-10-15 4:10 ` [PATCH v5 49/67] target/ppc: Move SPR_DSISR setting to powerpc_excp Richard Henderson
2021-10-15 4:10 ` [PATCH v5 50/67] target/ppc: Set fault address in ppc_cpu_do_unaligned_access Richard Henderson
2021-10-15 4:10 ` [PATCH v5 51/67] target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu Richard Henderson
2021-10-15 19:06 ` Warner Losh
2021-10-29 23:36 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 52/67] target/s390x: Implement s390x_cpu_record_sigbus Richard Henderson
2021-10-29 23:38 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 53/67] linux-user/hppa: Remove POWERPC_EXCP_ALIGN handling Richard Henderson
2021-10-29 23:39 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 54/67] target/sh4: Set fault address in superh_cpu_do_unaligned_access Richard Henderson
2021-10-15 4:10 ` [PATCH v5 55/67] target/sparc: Remove DEBUG_UNALIGNED Richard Henderson
2021-10-15 4:10 ` [PATCH v5 56/67] target/sparc: Split out build_sfsr Richard Henderson
2021-10-15 4:10 ` [PATCH v5 57/67] target/sparc: Set fault address in sparc_cpu_do_unaligned_access Richard Henderson
2021-10-15 4:10 ` [PATCH v5 58/67] accel/tcg: Report unaligned atomics for user-only Richard Henderson
2021-10-15 19:08 ` Warner Losh
2021-10-29 23:43 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 59/67] accel/tcg: Report unaligned load/store " Richard Henderson
2021-10-15 19:08 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 60/67] tcg: Add helper_unaligned_{ld, st} for user-only sigbus Richard Henderson
2021-10-15 19:09 ` Warner Losh
2021-10-29 23:44 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 61/67] linux-user: Handle BUS_ADRALN in host_signal_handler Richard Henderson
2021-10-29 23:46 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 62/67] linux-user: Split out do_prctl and subroutines Richard Henderson
2021-10-15 4:10 ` [PATCH v5 63/67] linux-user: Disable more prctl subcodes Richard Henderson
2021-10-15 4:10 ` [PATCH v5 64/67] linux-user: Add code for PR_GET/SET_UNALIGN Richard Henderson
2021-10-15 19:11 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 65/67] target/alpha: Implement prctl_unalign_sigbus Richard Henderson
2021-10-15 4:10 ` [PATCH v5 66/67] target/hppa: " Richard Henderson
2021-10-15 4:10 ` [PATCH v5 67/67] target/sh4: " Richard Henderson
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