Re: [RFC PATCH] tcg: Restrict qemu_ld2 and qemu_st2 opcodes to 32-bit hosts

[Richard Henderson <richard.henderson@linaro.org>]

On 10/9/25 10:43, Philippe Mathieu-Daudé wrote:
> On 9/10/25 19:23, Philippe Mathieu-Daudé wrote:
>> On 21/8/25 22:27, Richard Henderson wrote:
>>> On 8/20/25 23:49, Philippe Mathieu-Daudé wrote:
>>>> qemu_ld2 and qemu_st2 opcodes are band-aid for 32-bit hosts
>>>> and can't be reached on 64-bit ones. See in commit 3bedb9d3e28
>>>> ("tcg: Convert qemu_ld{2} to TCGOutOpLoad{2}") and 86fe5c2597c
>>>> ("tcg: Convert qemu_st{2} to TCGOutOpLdSt{2}") their constraint
>>>> is C_NotImplemented.
>>>
>>> Not true: ld2/st2 are also used for 128-bit load store.
>>>
>>> See: aarch64, x86_64, loongarch64, ppc64, s390x.
>>
>> OK. Hmm I guess I need to add a __attribute__((unused)) check like
>> you did in commit f408df587a0 ("tcg: Convert brcond2_i32 to
>> TCGOutOpBrcond2") to outop_qemu_ld2/st2 then.
> 
> OK I figured my issue, I shouldn't remove the following in the
> MIPS series [*]:
> 
> -- >8 --
> diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
> index 3f4aca25b13..c519dfbf7d5 100644
> --- a/tcg/mips/tcg-target.c.inc
> +++ b/tcg/mips/tcg-target.c.inc
> @@ -1311,2 +1311,34 @@ static const TCGOutOpQemuLdSt outop_qemu_ld = {
> 
> +static void tgen_qemu_ld2(TCGContext *s, TCGType type, TCGReg datalo,
> +                          TCGReg datahi, TCGReg addr, MemOpIdx oi)
> +{
> +    MemOp opc = get_memop(oi);
> +    TCGLabelQemuLdst *ldst;
> +    HostAddress h;
> +
> +    tcg_debug_assert(TCG_TARGET_REG_BITS == 32);
> +    ldst = prepare_host_addr(s, &h, addr, oi, true);
> +
> +    if (use_mips32r6_instructions || h.aa.align >= (opc & MO_SIZE)) {
> +        tcg_out_qemu_ld_direct(s, datalo, datahi, h.base, opc, type);
> +    } else {
> +        tcg_out_qemu_ld_unalign(s, datalo, datahi, h.base, opc, type);
> +    }
> +
> +    if (ldst) {
> +        ldst->type = type;
> +        ldst->datalo_reg = datalo;
> +        ldst->datahi_reg = datahi;
> +        ldst->raddr = tcg_splitwx_to_rx(s->code_ptr);
> +    }
> +}
> +
> +static const TCGOutOpQemuLdSt2 outop_qemu_ld2 = {
> +    /* Ensure that the mips32 code is compiled but discarded for mips64. */
> +    .base.static_constraint =
> +        TCG_TARGET_REG_BITS == 32 ? C_O2_I1(r, r, r) : C_NotImplemented,
> +    .out =
> +        TCG_TARGET_REG_BITS == 32 ? tgen_qemu_ld2 : NULL,
> +};

In the mips32 removal series, you should be removing the functions and simplifying this 
structure to

static const TCGOutOpQemuLdSt2 outop_qemu_ld2 = {
     .base.static_constraint = C_NotImplemented,
};

> +static const TCGOutOpQemuLdSt2 outop_qemu_st2 = {

Likewise.


r~