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Tsirkin" To: qemu-devel@nongnu.org Cc: Peter Maydell , Bernhard Beschow , Paolo Bonzini , Richard Henderson , Eduardo Habkost , Marcel Apfelbaum , =?utf-8?B?SGVydsOp?= Poussineau , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , Aurelien Jarno Subject: [PULL 63/83] hw/isa/piix: Allow for optional PIT creation in PIIX3 Message-ID: <9a43333153a589e122b185aee78971024d437ea0.1697644299.git.mst@redhat.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Mailer: git-send-email 2.27.0.106.g8ac3dc51b1 X-Mutt-Fcc: =sent Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bernhard Beschow In the PC machine, the PIT is created in board code to allow it to be virtualized with various virtualization techniques. So explicitly disable its creation in the PC machine via a property which defaults to enabled. Once the PIIX implementations are consolidated this default will keep Malta working without further ado. Signed-off-by: Bernhard Beschow Message-Id: <20231007123843.127151-22-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/southbridge/piix.h | 1 + hw/i386/pc_piix.c | 2 ++ hw/isa/piix.c | 6 ++++++ 3 files changed, 9 insertions(+) diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 08491693b4..86709ba2e4 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -70,6 +70,7 @@ struct PIIXState { bool has_acpi; bool has_pic; + bool has_pit; bool has_usb; bool smm_enabled; }; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index fa39afd891..e38942a3c3 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -270,6 +270,8 @@ static void pc_init1(MachineState *machine, &error_abort); object_property_set_bool(OBJECT(pci_dev), "has-pic", false, &error_abort); + object_property_set_bool(OBJECT(pci_dev), "has-pit", false, + &error_abort); qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100); object_property_set_bool(OBJECT(pci_dev), "smm-enabled", x86_machine_is_smm_enabled(x86ms), diff --git a/hw/isa/piix.c b/hw/isa/piix.c index d6d9ac6473..270b8eb1f7 100644 --- a/hw/isa/piix.c +++ b/hw/isa/piix.c @@ -361,6 +361,11 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) isa_bus_register_input_irqs(isa_bus, d->isa_irqs_in); + /* PIT */ + if (d->has_pit) { + i8254_pit_init(isa_bus, 0x40, 0, NULL); + } + i8257_dma_init(isa_bus, 0); /* RTC */ @@ -436,6 +441,7 @@ static Property pci_piix3_props[] = { DEFINE_PROP_UINT32("smb_io_base", PIIXState, smb_io_base, 0), DEFINE_PROP_BOOL("has-acpi", PIIXState, has_acpi, true), DEFINE_PROP_BOOL("has-pic", PIIXState, has_pic, true), + DEFINE_PROP_BOOL("has-pit", PIIXState, has_pit, true), DEFINE_PROP_BOOL("has-usb", PIIXState, has_usb, true), DEFINE_PROP_BOOL("smm-enabled", PIIXState, smm_enabled, false), DEFINE_PROP_END_OF_LIST(), -- MST