From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Stefan Hajnoczi <stefanha@redhat.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PULL 00/49] Misc HW patches for 2025-01-12
Date: Mon, 13 Jan 2025 16:40:25 +0100 [thread overview]
Message-ID: <9a6988a7-d715-491c-8faf-9981bbda0583@linaro.org> (raw)
In-Reply-To: <20250112221726.30206-1-philmd@linaro.org>
Hi Stefan,
Please drop this PR since Igor made a comment on a patch,
Thanks!
On 12/1/25 23:16, Philippe Mathieu-Daudé wrote:
> The following changes since commit 3214bec13d8d4c40f707d21d8350d04e4123ae97:
>
> Merge tag 'migration-20250110-pull-request' of https://gitlab.com/farosas/qemu into staging (2025-01-10 13:39:19 -0500)
>
> are available in the Git repository at:
>
> https://github.com/philmd/qemu.git tags/hw-misc-20250112
>
> for you to fetch changes up to 4a0031691596bd81c5949cf4632a6d178f8c2fe5:
>
> Add a b4 configuration file (2025-01-12 23:06:29 +0100)
>
> ----------------------------------------------------------------
> Misc HW patches queue
>
> - Silent unuseful DTC warnings (Philippe)
> - Add few QOM parentship relations (Philippe)
> - Rework XilinX EthLite RAM buffers (Philippe)
> - Convert vmcoreinfo to 3-phase reset (Philippe)
> - Convert HPPA CPUs to 3-phase reset (Helge)
> - Fix UFS endianness issue (Keoseong)
> - Introduce pci_set_enabled (Akihiko)
> - Clarify Enclave and Firecracker relationship (Alexander)
> - Set SDHCI DMA interrupt status bit in correct place (Bernhard)
> - Fix leak in cryptodev-vhost-user backend (Gabriel)
> - Use USB XHCI ring 0 when mapping is not supported (Phil)
> - Convert DPRINTF to trace events (Nikita, Bernhard)
> - Remove &first_cpu in TriCore machine (Philippe)
> - Checkpatch style cleanups (Bibo)
> - MAINTAINERS updates (Marcin, Gustavo, Akihiko)
> - Add default configuration for b4 tool (Jiaxun)
>
> ----------------------------------------------------------------
prev parent reply other threads:[~2025-01-13 15:41 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-12 22:16 [PULL 00/49] Misc HW patches for 2025-01-12 Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 01/49] pc-bios/meson.build: Silent unuseful DTC warnings Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 02/49] target: Replace DEVICE(object_new) -> qdev_new() Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 03/49] hw: " Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 04/49] hw: Add QOM parentship relation with CPUs Philippe Mathieu-Daudé
2025-01-13 12:28 ` Igor Mammedov
2025-01-13 16:00 ` Philippe Mathieu-Daudé
2025-01-14 10:18 ` Igor Mammedov
2025-01-14 12:38 ` Markus Armbruster
2025-01-15 10:19 ` Igor Mammedov
2025-01-15 17:44 ` Peter Xu
2025-02-25 11:50 ` Igor Mammedov
2025-01-14 14:38 ` Zhao Liu
2025-01-15 13:13 ` Igor Mammedov
2025-01-15 14:07 ` Zhao Liu
2025-01-12 22:16 ` [PULL 05/49] hw/usb: Inline usb_try_new() Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 06/49] hw/usb: Inline usb_new() Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 07/49] hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 08/49] hw/net/xilinx_ethlite: Map MDIO registers (as unimplemented) Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 09/49] hw/net/xilinx_ethlite: Introduce txbuf_ptr() helper Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 10/49] hw/net/xilinx_ethlite: Introduce rxbuf_ptr() helper Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 11/49] hw/net/xilinx_ethlite: Access TX_GIE register for each port Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 12/49] hw/net/xilinx_ethlite: Access TX_LEN " Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 13/49] hw/net/xilinx_ethlite: Access TX_CTRL " Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 14/49] hw/net/xilinx_ethlite: Map RX_CTRL as MMIO Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 15/49] hw/net/xilinx_ethlite: Map TX_LEN " Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 16/49] hw/net/xilinx_ethlite: Map TX_GIE " Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 17/49] hw/net/xilinx_ethlite: Map TX_CTRL " Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 18/49] hw/net/xilinx_ethlite: Map the RAM buffer as RAM memory region Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 19/49] hw/net/xilinx_ethlite: Rename 'mmio' MR as 'container' Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 20/49] hw/net/xilinx_ethlite: Map RESERVED I/O as unimplemented Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 21/49] docs/nitro-enclave: Clarify Enclave and Firecracker relationship Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 22/49] hw/misc/vmcoreinfo: Rename VMCOREINFO_DEVICE -> TYPE_VMCOREINFO Philippe Mathieu-Daudé
2025-01-12 22:16 ` [PULL 23/49] hw/misc/vmcoreinfo: Convert to three-phase reset interface Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 24/49] hw/pci: Rename has_power to enabled Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 25/49] hw/ufs: Adjust value to match CPU's endian format Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 26/49] hw/sd/sdhci: Set SDHC_NIS_DMA bit when appropriate Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 27/49] hw/sd/sdhci: Factor sdhci_sdma_transfer() out Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 28/49] hw/char/stm32f2xx_usart: replace print with trace Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 29/49] hw/timer/imx_gpt: Remove unused define Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 30/49] tests/qtest/libqos: Reuse TYPE_IMX_I2C define Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 31/49] hw/misc/imx6_src: Convert DPRINTF() to trace events Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 32/49] hw/char/imx_serial: Turn some DPRINTF() statements into " Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 33/49] hw/i2c/imx_i2c: Convert DPRINTF() to " Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 34/49] hw/gpio/imx_gpio: Turn DPRINTF() into " Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 35/49] tests/qtest/boot-serial-test: Correct HPPA machine name Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 36/49] tests: Add functional tests for HPPA machines Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 37/49] target/hppa: Convert hppa_cpu_init() to ResetHold handler Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 38/49] hw/hppa: Reset vCPUs calling resettable_reset() Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 39/49] target/hppa: Only set PSW 'M' bit on reset Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 40/49] target/hppa: Set PC on vCPU reset Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 41/49] target/hppa: Speed up hppa_is_pa20() Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 42/49] hw/loongarch/virt: Checkpatch cleanup Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 43/49] backends/cryptodev-vhost-user: Fix local_error leaks Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 44/49] hw/usb/hcd-xhci-pci: Use event ring 0 if mapping unsupported Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 45/49] hw/tricore/triboard: Remove unnecessary use of &first_cpu Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 46/49] MAINTAINERS: remove myself from sbsa-ref Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 47/49] MAINTAINERS: Add me as the maintainer for ivshmem-flat Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 48/49] MAINTAINERS: Update path to coreaudio.m Philippe Mathieu-Daudé
2025-01-12 22:17 ` [PULL 49/49] Add a b4 configuration file Philippe Mathieu-Daudé
2025-01-13 15:40 ` Philippe Mathieu-Daudé [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=9a6988a7-d715-491c-8faf-9981bbda0583@linaro.org \
--to=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=stefanha@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).