Re: [PATCH for-10.0 01/25] fpu: handle raising Invalid for infzero in pick_nan_muladd

[Richard Henderson <richard.henderson@linaro.org>]

On 11/28/24 04:42, Peter Maydell wrote:
> For IEEE fused multiply-add, the (0 * inf) + NaN case should raise
> Invalid for the multiplication of 0 by infinity.  Currently we handle
> this in the per-architecture ifdef ladder in pickNaNMulAdd().
> However, since this isn't really architecture specific we can hoist
> it up to the generic code.
> 
> For the cases where the infzero test in pickNaNMulAdd was
> returning 2, we can delete the check entirely and allow the
> code to fall into the normal pick-a-NaN handling, because this
> will return 2 anyway (input 'c' being the only NaN in this case).
> For the cases where infzero was returning 3 to indicate "return
> the default NaN", we must retain that "return 3".
> 
> For Arm, this looks like it might be a behaviour change because we
> used to set float_flag_invalid | float_flag_invalid_imz only if C is
> a quiet NaN.  However, it is not, because Arm target code never looks
> at float_flag_invalid_imz, and for the (0 * inf) + SNaN case we
> already raised float_flag_invalid via the "abc_mask &
> float_cmask_snan" check in pick_nan_muladd.
> 
> For any target architecture using the "default implementation" at the
> bottom of the ifdef, this is a behaviour change but will be fixing a
> bug (where we failed to raise the Invalid exception for (0 * inf +
> QNaN).  The architectures using the default case are:
>   * hppa
>   * sh4
>   * tricore
> 
> The Tricore and SH4 CPU architecture manuals are clear that this
> should have raised Invalid; HPPA is a bit vaguer but still seems
> clear enough.
> 
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
>   fpu/softfloat-parts.c.inc      | 13 +++++++------
>   fpu/softfloat-specialize.c.inc | 29 +----------------------------
>   2 files changed, 8 insertions(+), 34 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~