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From: Thomas Huth <thuth@redhat.com>
Message-ID: <9ac50d18-bd27-a32d-8e80-b92bfd975a8f@redhat.com>
Date: Thu, 26 Jan 2017 10:42:25 +0100
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Subject: Re: [Qemu-devel] [PULL 26/36] hw/intc/arm_gicv3: Add accessors for
 ICH_ system registers
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To: Paolo Bonzini <pbonzini@redhat.com>, Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org

On 26.01.2017 10:35, Paolo Bonzini wrote:
> 
> 
> On 19/01/2017 15:09, Peter Maydell wrote:
>> +        uint64_t lr = cs->ich_lr_el2[i];
>> +
>> +        if ((lr & ICH_LR_EL2_STATE_MASK) == 0 &&
>> +            ((lr & ICH_LR_EL2_HW) == 1 || (lr & ICH_LR_EL2_EOI) == 0)) {
> 
> This should be "!= 0", not == 1 (reported by Coverity).

A patch for this issue is already on the mailing list - see "arm_gicv3:
Fix broken logic in ELRSR calculation"

 Thomas