From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: Re: [PATCH 24/82] include/hw/core/cpu: Introduce cpu_tlb_fast
Date: Wed, 30 Jul 2025 13:53:44 -0700 [thread overview]
Message-ID: <9b3b9cdd-c6d5-4c98-8fd9-be0402ad1804@linaro.org> (raw)
In-Reply-To: <20250727080254.83840-25-richard.henderson@linaro.org>
On 7/27/25 1:01 AM, Richard Henderson wrote:
> Encapsulate access to cpu->neg.tlb.f[] in a function.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/hw/core/cpu.h | 7 +++++++
> accel/tcg/cputlb.c | 16 ++++++++--------
> 2 files changed, 15 insertions(+), 8 deletions(-)
>
> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
> index 1153cadb70..bd835b07d5 100644
> --- a/include/hw/core/cpu.h
> +++ b/include/hw/core/cpu.h
> @@ -593,6 +593,13 @@ static inline CPUArchState *cpu_env(CPUState *cpu)
> return (CPUArchState *)(cpu + 1);
> }
>
> +#ifdef CONFIG_TCG
> +static inline CPUTLBDescFast *cpu_tlb_fast(CPUState *cpu, int mmu_idx)
> +{
> + return &cpu->neg.tlb.f[mmu_idx];
> +}
> +#endif
> +
> typedef QTAILQ_HEAD(CPUTailQ, CPUState) CPUTailQ;
> extern CPUTailQ cpus_queue;
>
> diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
> index d324f33339..2a6aa01c57 100644
> --- a/accel/tcg/cputlb.c
> +++ b/accel/tcg/cputlb.c
> @@ -129,7 +129,7 @@ static inline uint64_t tlb_addr_write(const CPUTLBEntry *entry)
> static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx,
> vaddr addr)
> {
> - uintptr_t size_mask = cpu->neg.tlb.f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS;
> + uintptr_t size_mask = cpu_tlb_fast(cpu, mmu_idx)->mask >> CPU_TLB_ENTRY_BITS;
>
> return (addr >> TARGET_PAGE_BITS) & size_mask;
> }
> @@ -138,7 +138,7 @@ static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx,
> static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx,
> vaddr addr)
> {
> - return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)];
> + return &cpu_tlb_fast(cpu, mmu_idx)->table[tlb_index(cpu, mmu_idx, addr)];
> }
>
> static void tlb_window_reset(CPUTLBDesc *desc, int64_t ns,
> @@ -292,7 +292,7 @@ static void tlb_flush_one_mmuidx_locked(CPUState *cpu, int mmu_idx,
> int64_t now)
> {
> CPUTLBDesc *desc = &cpu->neg.tlb.d[mmu_idx];
> - CPUTLBDescFast *fast = &cpu->neg.tlb.f[mmu_idx];
> + CPUTLBDescFast *fast = cpu_tlb_fast(cpu, mmu_idx);
>
> tlb_mmu_resize_locked(desc, fast, now);
> tlb_mmu_flush_locked(desc, fast);
> @@ -331,7 +331,7 @@ void tlb_init(CPUState *cpu)
> cpu->neg.tlb.c.dirty = 0;
>
> for (i = 0; i < NB_MMU_MODES; i++) {
> - tlb_mmu_init(&cpu->neg.tlb.d[i], &cpu->neg.tlb.f[i], now);
> + tlb_mmu_init(&cpu->neg.tlb.d[i], cpu_tlb_fast(cpu, i), now);
> }
> }
>
> @@ -342,7 +342,7 @@ void tlb_destroy(CPUState *cpu)
> qemu_spin_destroy(&cpu->neg.tlb.c.lock);
> for (i = 0; i < NB_MMU_MODES; i++) {
> CPUTLBDesc *desc = &cpu->neg.tlb.d[i];
> - CPUTLBDescFast *fast = &cpu->neg.tlb.f[i];
> + CPUTLBDescFast *fast = cpu_tlb_fast(cpu, i);
>
> g_free(fast->table);
> g_free(desc->fulltlb);
> @@ -667,7 +667,7 @@ static void tlb_flush_range_locked(CPUState *cpu, int midx,
> unsigned bits)
> {
> CPUTLBDesc *d = &cpu->neg.tlb.d[midx];
> - CPUTLBDescFast *f = &cpu->neg.tlb.f[midx];
> + CPUTLBDescFast *f = cpu_tlb_fast(cpu, midx);
> vaddr mask = MAKE_64BIT_MASK(0, bits);
>
> /*
> @@ -923,7 +923,7 @@ void tlb_reset_dirty(CPUState *cpu, uintptr_t start, uintptr_t length)
> qemu_spin_lock(&cpu->neg.tlb.c.lock);
> for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
> CPUTLBDesc *desc = &cpu->neg.tlb.d[mmu_idx];
> - CPUTLBDescFast *fast = &cpu->neg.tlb.f[mmu_idx];
> + CPUTLBDescFast *fast = cpu_tlb_fast(cpu, mmu_idx);
> unsigned int n = tlb_n_entries(fast);
> unsigned int i;
>
> @@ -1316,7 +1316,7 @@ static bool victim_tlb_hit(CPUState *cpu, size_t mmu_idx, size_t index,
>
> if (cmp == page) {
> /* Found entry in victim tlb, swap tlb and iotlb. */
> - CPUTLBEntry tmptlb, *tlb = &cpu->neg.tlb.f[mmu_idx].table[index];
> + CPUTLBEntry tmptlb, *tlb = &cpu_tlb_fast(cpu, mmu_idx)->table[index];
>
> qemu_spin_lock(&cpu->neg.tlb.c.lock);
> copy_tlb_helper_locked(&tmptlb, tlb);
It's sad, my eyes were just getting used to read those accesses :)
More seriously, that's clearer, thanks.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
next prev parent reply other threads:[~2025-07-30 21:11 UTC|newest]
Thread overview: 188+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-27 8:01 [PATCH for-10.2 00/82] target/arm: Implement FEAT_GCS Richard Henderson
2025-07-27 8:01 ` [PATCH 01/82] target/arm: Add prot_check parameter to pmsav8_mpu_lookup Richard Henderson
2025-07-30 20:27 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 02/82] target/arm: Add in_prot_check to S1Translate Richard Henderson
2025-07-30 20:27 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 03/82] target/arm: Skip permission check from arm_cpu_get_phys_page_attrs_debug Richard Henderson
2025-07-30 20:28 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 04/82] target/arm: Introduce get_phys_addr_for_at Richard Henderson
2025-07-30 20:29 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 05/82] target/arm: Skip AF and DB updates for AccessType_AT Richard Henderson
2025-07-30 20:31 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 06/82] target/arm: Add prot_check parameter to do_ats_write Richard Henderson
2025-07-30 20:35 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 07/82] target/arm: Fill in HFG[RWI]TR_EL2 bits for Arm v9.5 Richard Henderson
2025-07-30 20:35 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 08/82] target/arm: Remove outdated comment for ZCR_EL12 Richard Henderson
2025-07-30 20:36 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 09/82] target/arm: Implement FEAT_ATS1A Richard Henderson
2025-07-30 20:38 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 10/82] target/arm: Add isar feature test for FEAT_S1PIE, FEAT_S2PIE Richard Henderson
2025-07-30 20:38 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 11/82] target/arm: Enable TCR2_ELx.PIE Richard Henderson
2025-07-30 20:39 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 12/82] target/arm: Implement PIR_ELx, PIRE0_ELx, S2PIR_EL2 registers Richard Henderson
2025-07-30 20:41 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 13/82] target/arm: Force HPD for stage2 translations Richard Henderson
2025-07-30 20:42 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 14/82] target/arm: Cache NV1 early in get_phys_addr_lpae Richard Henderson
2025-07-30 20:43 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 15/82] target/arm: Populate PIE in aa64_va_parameters Richard Henderson
2025-07-30 20:45 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 16/82] target/arm: Implement get_S1prot_indirect Richard Henderson
2025-07-31 21:15 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 17/82] target/arm: Implement get_S2prot_indirect Richard Henderson
2025-07-31 21:13 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 18/82] target/arm: Do not migrate env->exception Richard Henderson
2025-07-30 20:46 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 19/82] target/arm: Expand CPUARMState.exception.syndrome to 64 bits Richard Henderson
2025-07-30 20:47 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 20/82] target/arm: Expand syndrome parameter to raise_exception* Richard Henderson
2025-07-30 20:47 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 21/82] target/arm: Implement dirtybit check for PIE Richard Henderson
2025-07-30 20:50 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 22/82] target/arm: Enable FEAT_S1PIE and FEAT_S2PIE on -cpu max Richard Henderson
2025-07-30 20:50 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 23/82] include/hw/core/cpu: Introduce MMUIdxMap Richard Henderson
2025-07-30 20:52 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 24/82] include/hw/core/cpu: Introduce cpu_tlb_fast Richard Henderson
2025-07-30 20:53 ` Pierrick Bouvier [this message]
2025-07-27 8:01 ` [PATCH 25/82] include/hw/core/cpu: Invert the indexing into CPUTLBDescFast Richard Henderson
2025-07-30 21:00 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 26/82] target/hppa: Adjust mmu indexes to begin with 0 Richard Henderson
2025-07-30 21:03 ` Pierrick Bouvier
2025-07-27 8:01 ` [PATCH 27/82] include/exec/memopidx: Adjust for 32 mmu indexes Richard Henderson
2025-07-30 21:03 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 28/82] include/hw/core/cpu: Widen MMUIdxMap Richard Henderson
2025-07-30 21:07 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 29/82] target/arm: Split out mmuidx.h from cpu.h Richard Henderson
2025-07-30 21:07 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 30/82] target/arm: Convert arm_mmu_idx_to_el from switch to table Richard Henderson
2025-07-30 21:10 ` Pierrick Bouvier
2025-07-30 21:12 ` Pierrick Bouvier
2025-07-30 21:31 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 31/82] target/arm: Remove unused env argument from regime_el Richard Henderson
2025-07-30 21:13 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 32/82] target/arm: Convert regime_el from switch to table Richard Henderson
2025-07-30 21:15 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 33/82] target/arm: Convert regime_has_2_ranges " Richard Henderson
2025-07-30 21:16 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 34/82] target/arm: Remove unused env argument from regime_is_pan Richard Henderson
2025-07-30 21:17 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 35/82] target/arm: Convert regime_is_pan from switch to table Richard Henderson
2025-07-30 21:17 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 36/82] target/arm: Remove unused env argument from regime_is_user Richard Henderson
2025-07-30 21:18 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 37/82] target/arm: Convert regime_is_user from switch to table Richard Henderson
2025-07-30 21:21 ` Pierrick Bouvier
2025-08-01 3:53 ` Richard Henderson
2025-08-01 16:10 ` Pierrick Bouvier
2025-08-01 18:06 ` Peter Maydell
2025-07-27 8:02 ` [PATCH 38/82] target/arm: Convert arm_mmu_idx_is_stage1_of_2 " Richard Henderson
2025-07-30 21:23 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 39/82] target/arm: Convert regime_is_stage2 " Richard Henderson
2025-07-30 21:23 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 40/82] target/arm: Introduce mmu indexes for GCS Richard Henderson
2025-07-30 21:28 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 41/82] target/arm: Introduce regime_to_gcs Richard Henderson
2025-07-30 21:33 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 42/82] target/arm: Support page protections for GCS mmu indexes Richard Henderson
2025-07-31 18:40 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 43/82] target/arm: Implement gcs bit for data abort Richard Henderson
2025-07-31 18:41 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 44/82] target/arm: Add GCS cpregs Richard Henderson
2025-07-31 18:45 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 45/82] target/arm: Add GCS enable and trap levels to DisasContext Richard Henderson
2025-07-31 18:54 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 46/82] target/arm: Implement FEAT_CHK Richard Henderson
2025-07-29 16:01 ` Gustavo Romero
2025-07-29 17:21 ` Richard Henderson
2025-07-31 18:59 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 47/82] target/arm: Expand pstate to 64 bits Richard Henderson
2025-07-31 19:13 ` Pierrick Bouvier
2025-08-01 4:24 ` Richard Henderson
2025-08-01 12:35 ` Manos Pitsidianakis
2025-08-01 4:29 ` Richard Henderson
2025-08-01 16:12 ` Pierrick Bouvier
2025-08-01 20:19 ` Richard Henderson
2025-08-01 13:22 ` Peter Maydell
2025-08-01 16:26 ` Pierrick Bouvier
2025-08-01 16:37 ` Peter Maydell
2025-08-01 16:41 ` Pierrick Bouvier
2025-08-01 16:44 ` Peter Maydell
2025-08-01 16:53 ` Pierrick Bouvier
2025-08-01 16:55 ` Pierrick Bouvier
2025-08-01 18:45 ` Manos Pitsidianakis
2025-08-02 3:14 ` Thiago Jung Bauermann
2025-08-01 20:22 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 48/82] target/arm: Add syndrome data for EC_GCS Richard Henderson
2025-07-31 19:35 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 49/82] target/arm: Implement EXLOCKException for ELR_ELx and SPSR_ELx Richard Henderson
2025-07-31 20:53 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 50/82] target/arm: Split {arm,core}_user_mem_index Richard Henderson
2025-07-31 21:06 ` Pierrick Bouvier
2025-07-31 21:24 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 51/82] target/arm: Introduce delay_exception{_el} Richard Henderson
2025-07-31 21:09 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 52/82] target/arm: Emit HSTR trap exception out of line Richard Henderson
2025-07-31 21:10 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 53/82] target/arm: Emit v7m LTPSIZE " Richard Henderson
2025-07-31 21:10 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 54/82] target/arm: Implement GCSSTR, GCSSTTR Richard Henderson
2025-07-31 21:25 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 55/82] target/arm: Implement GCSB Richard Henderson
2025-07-31 21:27 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 56/82] target/arm: Implement GCSPUSHM Richard Henderson
2025-07-31 21:33 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 57/82] target/arm: Implement GCSPOPM Richard Henderson
2025-07-31 21:34 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 58/82] target/arm: Implement GCSPUSHX Richard Henderson
2025-07-31 21:36 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 59/82] target/arm: Implement GCSPOPX Richard Henderson
2025-07-31 21:37 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 60/82] target/arm: Implement GCSPOPCX Richard Henderson
2025-07-31 21:38 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 61/82] target/arm: Implement GCSSS1 Richard Henderson
2025-07-31 21:43 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 62/82] target/arm: Implement GCSSS2 Richard Henderson
2025-07-31 21:45 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 63/82] target/arm: Add gcs record for BL Richard Henderson
2025-07-31 21:45 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 64/82] target/arm: Add gcs record for BLR Richard Henderson
2025-07-31 21:46 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 65/82] target/arm: Add gcs record for BLR with PAuth Richard Henderson
2025-07-31 21:46 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 66/82] target/arm: Load gcs record for RET Richard Henderson
2025-07-31 21:47 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 67/82] target/arm: Load gcs record for RET with PAuth Richard Henderson
2025-07-31 21:48 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 68/82] target/arm: Copy EXLOCKEn to EXLOCK on exception to the same EL Richard Henderson
2025-07-31 21:48 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 69/82] target/arm: Implement EXLOCK check during exception return Richard Henderson
2025-07-31 21:49 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 70/82] target/arm: Enable FEAT_GCS with -cpu max Richard Henderson
2025-07-31 21:49 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 71/82] linux-user/aarch64: Implement prctls for GCS Richard Henderson
2025-07-31 21:53 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 72/82] linux-user/aarch64: Allocate new gcs stack on clone Richard Henderson
2025-07-31 21:54 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 73/82] linux-user/aarch64: Release gcs stack on thread exit Richard Henderson
2025-07-31 21:54 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 74/82] linux-user/aarch64: Implement map_shadow_stack syscall Richard Henderson
2025-07-31 21:55 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 75/82] target/arm: Enable GCSPR_EL0 for read in user-mode Richard Henderson
2025-07-31 21:56 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 76/82] linux-user/aarch64: Inject SIGSEGV for GCS faults Richard Henderson
2025-07-31 21:56 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 77/82] linux-user/aarch64: Generate GCS signal records Richard Henderson
2025-07-31 21:57 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 78/82] linux-user: Change exported get_elf_hwcap to abi_ulong Richard Henderson
2025-07-31 21:58 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 79/82] linux-user/aarch64: Enable GCS in HWCAP Richard Henderson
2025-07-31 21:58 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 80/82] tests/tcg/aarch64: Add gcsstr Richard Henderson
2025-07-31 22:05 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 81/82] tests/tcg/aarch64: Add gcspushm Richard Henderson
2025-07-31 22:11 ` Pierrick Bouvier
2025-07-27 8:02 ` [PATCH 82/82] tests/tcg/aarch64: Add gcsss Richard Henderson
2025-07-31 22:14 ` Pierrick Bouvier
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