From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
To: David Brenken <david.brenken@efs-auto.org>, qemu-devel@nongnu.org
Cc: Lars Biermanski <lars.biermanski@efs-auto.de>,
Andreas Konopik <andreas.konopik@efs-auto.com>,
Georg Hofstetter <georg.hofstetter@efs-auto.de>,
David Brenken <david.brenken@efs-auto.de>,
Robert Rasche <robert.rasche@efs-auto.de>,
Andreas Konopik <andreas.konopik@efs-auto.de>
Subject: Re: [Qemu-devel] [PATCH 4/5] tricore: add QSEED instruction
Date: Wed, 5 Jun 2019 17:04:10 +0200 [thread overview]
Message-ID: <9baa6207-17a2-7218-9ad2-9627de232304@mail.uni-paderborn.de> (raw)
In-Reply-To: <20190605061126.10244-5-david.brenken@efs-auto.org>
Hi,
On 6/5/19 8:11 AM, David Brenken wrote:
> +/*
> + * Target TriCore QSEED.F significand Lookup Table
> + *
> + * The QSEED.F output significand depends on the least-significant
> + * exponent bit and the 6 most-significant significand bits.
> + *
> + * IEEE 754 float datatype
> + * partitioned into Sign (S), Exponent (E) and Significand (M):
> + *
> + * S E E E E E E E E M M M M M M ...
> + * | | |
> + * +------+------+-------+-------+
> + * | |
> + * for lookup table
> + * calculating index for
> + * output E output M
> + */
> +static const uint8_t target_qseed_significand_table[128] = {
> + 253, 252, 245, 244, 239, 238, 231, 230, 225, 224, 217, 216,
> + 211, 210, 205, 204, 201, 200, 195, 194, 189, 188, 185, 184,
> + 179, 178, 175, 174, 169, 168, 165, 164, 161, 160, 157, 156,
> + 153, 152, 149, 148, 145, 144, 141, 140, 137, 136, 133, 132,
> + 131, 130, 127, 126, 123, 122, 121, 120, 117, 116, 115, 114,
> + 111, 110, 109, 108, 103, 102, 99, 98, 93, 92, 89, 88, 83,
> + 82, 79, 78, 75, 74, 71, 70, 67, 66, 63, 62, 59, 58, 55,
> + 54, 53, 52, 49, 48, 45, 44, 43, 42, 39, 38, 37, 36, 33,
> + 32, 31, 30, 27, 26, 25, 24, 23, 22, 19, 18, 17, 16, 15,
> + 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2
> +};
Can you explain in a comment how you arrived at this lookup table?
> + } else if (float32_is_neg(arg1)) {
> + result = float32_sqrt_nan;
> + env->FPU_FI = 1;
[...]
> +
> + flags = f_get_excp_flags(env);
> + if (flags) {
> + if (flags & float_flag_invalid) {
> + f_update_psw_flags(env, flags);
> + } else {
> + env->FPU_FS = 0;
> + }
> + } else {
> + env->FPU_FS = 0;
You are setting FPU_FS to 0, even though FPU_FI might have been set in
case of a NaN. I think it's best to remove the whole softfloat check, as
none of the softfloat functions you call, can raise any flags.
Cheers,
Bastian
next prev parent reply other threads:[~2019-06-05 15:05 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-05 6:11 [Qemu-devel] [PATCH 0/5] tricore: adding new instructions and fixing issues David Brenken
2019-06-05 6:11 ` [Qemu-devel] [PATCH 1/5] tricore: add FTOIZ instruction David Brenken
2019-06-05 14:27 ` Bastian Koppelmann
2019-06-05 6:11 ` [Qemu-devel] [PATCH 2/5] tricore: add UTOF instruction David Brenken
2019-06-05 14:34 ` Bastian Koppelmann
2019-06-05 6:11 ` [Qemu-devel] [PATCH 3/5] tricore: fix RRPW_INSERT instruction David Brenken
2019-06-05 14:34 ` Bastian Koppelmann
2019-06-06 7:26 ` Brenken, David (EFS-GH2)
2019-06-07 12:48 ` Richard Henderson
2019-06-12 5:48 ` Brenken, David (EFS-GH2)
2019-06-12 11:52 ` Bastian Koppelmann
2019-06-05 6:11 ` [Qemu-devel] [PATCH 4/5] tricore: add QSEED instruction David Brenken
2019-06-05 15:04 ` Bastian Koppelmann [this message]
2019-06-07 8:40 ` Konopik, Andreas (EFS-GH2)
2019-06-05 6:11 ` [Qemu-devel] [PATCH 5/5] tricore: reset DisasContext before generating code David Brenken
2019-06-05 9:01 ` Bastian Koppelmann
2019-06-06 11:44 ` Hofstetter, Georg (EFS-GH2)
2019-06-06 14:24 ` Bastian Koppelmann
2019-06-05 15:10 ` [Qemu-devel] [PATCH 0/5] tricore: adding new instructions and fixing issues Bastian Koppelmann
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