Re: [PATCH v3 1/4] Add support for emulation of CRC32 instructions

["Philippe Mathieu-Daudé" <philmd@linaro.org>]

On 22/1/25 08:27, Philippe Mathieu-Daudé wrote:
> On 12/11/24 17:41, Aleksandar Rakic wrote:
>> Add emulation of MIPS' CRC32 (Cyclic Redundancy Check) instructions.
>> Reuse zlib crc32() and Linux crc32c().
>>
>> Cherry-picked 4cc974938aee1588f852590509004e340c072940
>> from https://github.com/MIPS/gnutools-qemu
>>
>> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
>> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
>> Signed-off-by: Aleksandar Rakic <aleksandar.rakic@htecgroup.com>
>> Reviewed-by: Aleksandar Rikalo <arikalo@gmail.com>
>> ---
>>   target/mips/helper.h             |  2 ++
>>   target/mips/meson.build          |  1 +
>>   target/mips/tcg/op_helper.c      | 26 ++++++++++++++++++++++++++
>>   target/mips/tcg/rel6.decode      |  5 +++++
>>   target/mips/tcg/rel6_translate.c | 14 ++++++++++++++
>>   target/mips/tcg/translate.c      | 25 +++++++++++++++++++++++++
>>   target/mips/tcg/translate.h      |  3 +++
>>   7 files changed, 76 insertions(+)
> 
> 
>> diff --git a/target/mips/tcg/rel6.decode b/target/mips/tcg/rel6.decode
>> index d6989cf56e..5074338aa5 100644
>> --- a/target/mips/tcg/rel6.decode
>> +++ b/target/mips/tcg/rel6.decode
>> @@ -16,11 +16,16 @@
>>   &r                  rs rt rd sa
>> +&special3_crc       rs rt c sz
>> +
>>   @lsa                ...... rs:5 rt:5 rd:5 ... sa:2 ......   &r
>> +@crc32              ...... rs:5 rt:5 ..... c:3 sz:2 ......   
>> &special3_crc
>>   LSA                 000000 ..... ..... ..... 000 .. 000101  @lsa
>>   DLSA                000000 ..... ..... ..... 000 .. 010101  @lsa
>> +CRC32               011111 ..... ..... 00000 ... .. 001111  @crc32

Are these really available on MIPS64? (Looking at MD00087 Revision 6.05)

> Interestingly the disassembly for that is in tree, hidden in commit
> 99029be1c28 ("target/mips: Add implementation of GINVT instruction")...