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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438b31ae97dsm15876475e9.22.2025.01.22.00.38.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 22 Jan 2025 00:38:21 -0800 (PST) Message-ID: <9bb8aa7b-a464-4dfc-9c76-7ab50d195b2f@linaro.org> Date: Wed, 22 Jan 2025 09:38:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/4] Add support for emulation of CRC32 instructions From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= To: Aleksandar Rakic , qemu-devel@nongnu.org Cc: aleksandar.rakic@htecgroup.com, djordje.todorovic@htecgroup.com, cfu@mips.com, arikalo@gmail.com, peter.maydell@linaro.org, aurelien@aurel32.net, jiaxun.yang@flygoat.com, kwolf@redhat.com, hreitz@redhat.com, pbonzini@redhat.com, alex.bennee@linaro.org, pierrick.bouvier@linaro.org, berrange@redhat.com, Yongbok Kim , Aleksandar Markovic References: <20241112164130.2396737-1-aleksandar.rakic@htecgroup.com> <20241112164130.2396737-3-aleksandar.rakic@htecgroup.com> Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 22/1/25 08:27, Philippe Mathieu-Daudé wrote: > On 12/11/24 17:41, Aleksandar Rakic wrote: >> Add emulation of MIPS' CRC32 (Cyclic Redundancy Check) instructions. >> Reuse zlib crc32() and Linux crc32c(). >> >> Cherry-picked 4cc974938aee1588f852590509004e340c072940 >> from https://github.com/MIPS/gnutools-qemu >> >> Signed-off-by: Yongbok Kim >> Signed-off-by: Aleksandar Markovic >> Signed-off-by: Aleksandar Rakic >> Reviewed-by: Aleksandar Rikalo >> --- >>   target/mips/helper.h             |  2 ++ >>   target/mips/meson.build          |  1 + >>   target/mips/tcg/op_helper.c      | 26 ++++++++++++++++++++++++++ >>   target/mips/tcg/rel6.decode      |  5 +++++ >>   target/mips/tcg/rel6_translate.c | 14 ++++++++++++++ >>   target/mips/tcg/translate.c      | 25 +++++++++++++++++++++++++ >>   target/mips/tcg/translate.h      |  3 +++ >>   7 files changed, 76 insertions(+) > > >> diff --git a/target/mips/tcg/rel6.decode b/target/mips/tcg/rel6.decode >> index d6989cf56e..5074338aa5 100644 >> --- a/target/mips/tcg/rel6.decode >> +++ b/target/mips/tcg/rel6.decode >> @@ -16,11 +16,16 @@ >>   &r                  rs rt rd sa >> +&special3_crc       rs rt c sz >> + >>   @lsa                ...... rs:5 rt:5 rd:5 ... sa:2 ......   &r >> +@crc32              ...... rs:5 rt:5 ..... c:3 sz:2 ...... >> &special3_crc >>   LSA                 000000 ..... ..... ..... 000 .. 000101  @lsa >>   DLSA                000000 ..... ..... ..... 000 .. 010101  @lsa >> +CRC32               011111 ..... ..... 00000 ... .. 001111  @crc32 Are these really available on MIPS64? (Looking at MD00087 Revision 6.05) > Interestingly the disassembly for that is in tree, hidden in commit > 99029be1c28 ("target/mips: Add implementation of GINVT instruction")...