* [PATCH v4] target/i386: Add notes for versioned CPU models
@ 2020-03-24 5:10 Tao Xu
2020-04-08 0:29 ` Tao Xu
2020-05-21 6:37 ` Tao Xu
0 siblings, 2 replies; 5+ messages in thread
From: Tao Xu @ 2020-03-24 5:10 UTC (permalink / raw)
To: ehabkost; +Cc: pbonzini, tao3.xu, qemu-devel, rth
Add which features are added or removed in this version.
Signed-off-by: Tao Xu <tao3.xu@intel.com>
---
The output is as follows:
qemu-system-x86_64 -cpu help | grep "\["
x86 Cascadelake-Server-v2 Intel Xeon Processor (Cascadelake) [ARCH_CAPABILITIES]
x86 Cascadelake-Server-v3 Intel Xeon Processor (Cascadelake) [ARCH_CAPABILITIES, no TSX]
x86 Denverton-v2 Intel Atom Processor (Denverton) [no MPX, no MONITOR]
x86 Icelake-Client-v2 Intel Core Processor (Icelake) [no TSX]
x86 Icelake-Server-v2 Intel Xeon Processor (Icelake) [no TSX]
Changes in v3:
- Keep the existing custom model-id (Eduardo)
Changes in v2:
- correct the note of Cascadelake v3 (Xiaoyao)
---
target/i386/cpu.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 34b511f078..1c7690baa0 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3192,6 +3192,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
.versions = (X86CPUVersionDefinition[]) {
{ .version = 1 },
{ .version = 2,
+ .note = "ARCH_CAPABILITIES",
.props = (PropValue[]) {
{ "arch-capabilities", "on" },
{ "rdctl-no", "on" },
@@ -3203,6 +3204,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
},
{ .version = 3,
.alias = "Cascadelake-Server-noTSX",
+ .note = "ARCH_CAPABILITIES, no TSX",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
@@ -3424,6 +3426,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no TSX",
.alias = "Icelake-Client-noTSX",
.props = (PropValue[]) {
{ "hle", "off" },
@@ -3541,6 +3544,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no TSX",
.alias = "Icelake-Server-noTSX",
.props = (PropValue[]) {
{ "hle", "off" },
@@ -3648,6 +3652,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no MPX, no MONITOR",
.props = (PropValue[]) {
{ "monitor", "off" },
{ "mpx", "off" },
--
2.20.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH v4] target/i386: Add notes for versioned CPU models
2020-03-24 5:10 [PATCH v4] target/i386: Add notes for versioned CPU models Tao Xu
@ 2020-04-08 0:29 ` Tao Xu
2020-05-21 6:37 ` Tao Xu
1 sibling, 0 replies; 5+ messages in thread
From: Tao Xu @ 2020-04-08 0:29 UTC (permalink / raw)
To: ehabkost@redhat.com
Cc: pbonzini@redhat.com, qemu-devel@nongnu.org, rth@twiddle.net
Ping for comments
On 3/24/2020 1:10 PM, Xu, Tao3 wrote:
> Add which features are added or removed in this version.
>
> Signed-off-by: Tao Xu <tao3.xu@intel.com>
> ---
>
> The output is as follows:
> qemu-system-x86_64 -cpu help | grep "\["
> x86 Cascadelake-Server-v2 Intel Xeon Processor (Cascadelake) [ARCH_CAPABILITIES]
> x86 Cascadelake-Server-v3 Intel Xeon Processor (Cascadelake) [ARCH_CAPABILITIES, no TSX]
> x86 Denverton-v2 Intel Atom Processor (Denverton) [no MPX, no MONITOR]
> x86 Icelake-Client-v2 Intel Core Processor (Icelake) [no TSX]
> x86 Icelake-Server-v2 Intel Xeon Processor (Icelake) [no TSX]
>
> Changes in v3:
> - Keep the existing custom model-id (Eduardo)
>
> Changes in v2:
> - correct the note of Cascadelake v3 (Xiaoyao)
> ---
> target/i386/cpu.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 34b511f078..1c7690baa0 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -3192,6 +3192,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> .versions = (X86CPUVersionDefinition[]) {
> { .version = 1 },
> { .version = 2,
> + .note = "ARCH_CAPABILITIES",
> .props = (PropValue[]) {
> { "arch-capabilities", "on" },
> { "rdctl-no", "on" },
> @@ -3203,6 +3204,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> },
> { .version = 3,
> .alias = "Cascadelake-Server-noTSX",
> + .note = "ARCH_CAPABILITIES, no TSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> @@ -3424,6 +3426,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no TSX",
> .alias = "Icelake-Client-noTSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> @@ -3541,6 +3544,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no TSX",
> .alias = "Icelake-Server-noTSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> @@ -3648,6 +3652,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no MPX, no MONITOR",
> .props = (PropValue[]) {
> { "monitor", "off" },
> { "mpx", "off" },
>
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v4] target/i386: Add notes for versioned CPU models
2020-03-24 5:10 [PATCH v4] target/i386: Add notes for versioned CPU models Tao Xu
2020-04-08 0:29 ` Tao Xu
@ 2020-05-21 6:37 ` Tao Xu
2020-06-23 7:43 ` Paolo Bonzini
1 sibling, 1 reply; 5+ messages in thread
From: Tao Xu @ 2020-05-21 6:37 UTC (permalink / raw)
To: ehabkost@redhat.com
Cc: pbonzini@redhat.com, qemu-devel@nongnu.org, rth@twiddle.net
Hi Eduardo
Could you review this patch?
Tao Xu
On 3/24/2020 1:10 PM, Xu, Tao3 wrote:
> Add which features are added or removed in this version.
>
> Signed-off-by: Tao Xu <tao3.xu@intel.com>
> ---
>
> The output is as follows:
> qemu-system-x86_64 -cpu help | grep "\["
> x86 Cascadelake-Server-v2 Intel Xeon Processor (Cascadelake) [ARCH_CAPABILITIES]
> x86 Cascadelake-Server-v3 Intel Xeon Processor (Cascadelake) [ARCH_CAPABILITIES, no TSX]
> x86 Denverton-v2 Intel Atom Processor (Denverton) [no MPX, no MONITOR]
> x86 Icelake-Client-v2 Intel Core Processor (Icelake) [no TSX]
> x86 Icelake-Server-v2 Intel Xeon Processor (Icelake) [no TSX]
>
> Changes in v3:
> - Keep the existing custom model-id (Eduardo)
>
> Changes in v2:
> - correct the note of Cascadelake v3 (Xiaoyao)
> ---
> target/i386/cpu.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 34b511f078..1c7690baa0 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -3192,6 +3192,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> .versions = (X86CPUVersionDefinition[]) {
> { .version = 1 },
> { .version = 2,
> + .note = "ARCH_CAPABILITIES",
> .props = (PropValue[]) {
> { "arch-capabilities", "on" },
> { "rdctl-no", "on" },
> @@ -3203,6 +3204,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> },
> { .version = 3,
> .alias = "Cascadelake-Server-noTSX",
> + .note = "ARCH_CAPABILITIES, no TSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> @@ -3424,6 +3426,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no TSX",
> .alias = "Icelake-Client-noTSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> @@ -3541,6 +3544,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no TSX",
> .alias = "Icelake-Server-noTSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> @@ -3648,6 +3652,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no MPX, no MONITOR",
> .props = (PropValue[]) {
> { "monitor", "off" },
> { "mpx", "off" },
>
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v4] target/i386: Add notes for versioned CPU models
2020-05-21 6:37 ` Tao Xu
@ 2020-06-23 7:43 ` Paolo Bonzini
2020-06-23 16:31 ` Eduardo Habkost
0 siblings, 1 reply; 5+ messages in thread
From: Paolo Bonzini @ 2020-06-23 7:43 UTC (permalink / raw)
To: Tao Xu, ehabkost@redhat.com; +Cc: qemu-devel@nongnu.org, rth@twiddle.net
On 21/05/20 08:37, Tao Xu wrote:
> Hi Eduardo
>
> Could you review this patch?
>
> Tao Xu
>
> On 3/24/2020 1:10 PM, Xu, Tao3 wrote:
>> Add which features are added or removed in this version.
>>
>> Signed-off-by: Tao Xu <tao3.xu@intel.com>
>> ---
>>
>> The output is as follows:
>> qemu-system-x86_64 -cpu help | grep "\["
>> x86 Cascadelake-Server-v2 Intel Xeon Processor (Cascadelake)
>> [ARCH_CAPABILITIES]
>> x86 Cascadelake-Server-v3 Intel Xeon Processor (Cascadelake)
>> [ARCH_CAPABILITIES, no TSX]
>> x86 Denverton-v2 Intel Atom Processor (Denverton) [no MPX, no
>> MONITOR]
>> x86 Icelake-Client-v2 Intel Core Processor (Icelake) [no TSX]
>> x86 Icelake-Server-v2 Intel Xeon Processor (Icelake) [no TSX]
>>
>> Changes in v3:
>> - Keep the existing custom model-id (Eduardo)
>>
>> Changes in v2:
>> - correct the note of Cascadelake v3 (Xiaoyao)
>> ---
>> target/i386/cpu.c | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
>> index 34b511f078..1c7690baa0 100644
>> --- a/target/i386/cpu.c
>> +++ b/target/i386/cpu.c
>> @@ -3192,6 +3192,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
>> .versions = (X86CPUVersionDefinition[]) {
>> { .version = 1 },
>> { .version = 2,
>> + .note = "ARCH_CAPABILITIES",
>> .props = (PropValue[]) {
>> { "arch-capabilities", "on" },
>> { "rdctl-no", "on" },
>> @@ -3203,6 +3204,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
>> },
>> { .version = 3,
>> .alias = "Cascadelake-Server-noTSX",
>> + .note = "ARCH_CAPABILITIES, no TSX",
>> .props = (PropValue[]) {
>> { "hle", "off" },
>> { "rtm", "off" },
>> @@ -3424,6 +3426,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
>> { .version = 1 },
>> {
>> .version = 2,
>> + .note = "no TSX",
>> .alias = "Icelake-Client-noTSX",
>> .props = (PropValue[]) {
>> { "hle", "off" },
>> @@ -3541,6 +3544,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
>> { .version = 1 },
>> {
>> .version = 2,
>> + .note = "no TSX",
>> .alias = "Icelake-Server-noTSX",
>> .props = (PropValue[]) {
>> { "hle", "off" },
>> @@ -3648,6 +3652,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
>> { .version = 1 },
>> {
>> .version = 2,
>> + .note = "no MPX, no MONITOR",
>> .props = (PropValue[]) {
>> { "monitor", "off" },
>> { "mpx", "off" },
>>
>
Queued, thanks.
Paolo
^ permalink raw reply [flat|nested] 5+ messages in thread
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2020-03-24 5:10 [PATCH v4] target/i386: Add notes for versioned CPU models Tao Xu
2020-04-08 0:29 ` Tao Xu
2020-05-21 6:37 ` Tao Xu
2020-06-23 7:43 ` Paolo Bonzini
2020-06-23 16:31 ` Eduardo Habkost
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