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From: Richard Henderson <richard.henderson@linaro.org>
To: Nicholas Piggin <npiggin@gmail.com>, qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org
Subject: Re: [RFC PATCH 2/3] tcg: add a ll/sc protection facility
Date: Tue, 20 Feb 2024 08:53:16 -1000	[thread overview]
Message-ID: <9c6c2c17-aa06-4c29-b0cc-742b641f813e@linaro.org> (raw)
In-Reply-To: <20240220041922.373029-3-npiggin@gmail.com>

On 2/19/24 18:19, Nicholas Piggin wrote:
> +    bool llsc_prot =
> +#ifdef TARGET_HAS_LLSC_PROT
> +        cpu_physical_memory_get_dirty_flag(addr, DIRTY_MEMORY_LLSC_PROT);
> +#else
> +        false;
> +#endif

We're trying to get rid of all target-specific adjustments to TCG.
We are not keen to introduce another.
Just drop the ifdefs.

> @@ -355,6 +379,8 @@ uint64_t cpu_physical_memory_set_dirty_lebitmap(unsigned long *bitmap,
>       unsigned long hpratio = qemu_real_host_page_size() / TARGET_PAGE_SIZE;
>       unsigned long page = BIT_WORD(start >> TARGET_PAGE_BITS);
>   
> +    assert(0);

Left over debugging?

> +
>       /* start address is aligned at the start of a word? */
>       if ((((page * BITS_PER_LONG) << TARGET_PAGE_BITS) == start) &&
>           (hpratio == 1)) {
> @@ -396,6 +422,12 @@ uint64_t cpu_physical_memory_set_dirty_lebitmap(unsigned long *bitmap,
>                       if (tcg_enabled()) {
>                           qatomic_or(&blocks[DIRTY_MEMORY_CODE][idx][offset],
>                                      temp);
> +#ifdef TARGET_HAS_LLSC_PROT
> +			/* XXX? */
> +                        qatomic_or(&blocks[DIRTY_MEMORY_LLSC_PROT][idx][offset],
> +                                   temp);
> +#endif
> +			assert(0);

Again.

> +++ b/include/hw/core/cpu.h
> @@ -489,6 +489,11 @@ struct CPUState {
>       uint64_t random_seed;
>       sigjmp_buf jmp_env;
>   
> +    int llsc_prot_block_size;
> +    bool llsc_prot_active;

Is active identical with block_size != 0.

> +    bool llsc_resolving;

I'm not following the logic around resolving and locks...


r~


  reply	other threads:[~2024-02-20 18:53 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-20  4:19 [RFC PATCH 0/3] real ll/sc emulation Nicholas Piggin
2024-02-20  4:19 ` [RFC PATCH 1/3] accel/tcg: Fix TCG TLB coherency race with physical dirty bit clearing Nicholas Piggin
2024-02-20  4:19 ` [RFC PATCH 2/3] tcg: add a ll/sc protection facility Nicholas Piggin
2024-02-20 18:53   ` Richard Henderson [this message]
2024-02-20  4:19 ` [RFC PATCH 3/3] target/ppc: Implement reservation protection for larx/stcx Nicholas Piggin
2024-02-20 19:03   ` Richard Henderson

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