From: Richard Henderson <richard.henderson@linaro.org>
To: Alexey Baturo <baturo.alexey@gmail.com>
Cc: qemu-riscv@nongnu.org, sagark@eecs.berkeley.edu,
kbastian@mail.uni-paderborn.de, qemu-devel@nongnu.org,
space.monkey.delivers@gmail.com, Alistair.Francis@wdc.com,
kupokupokupopo@gmail.com, palmer@dabbelt.com
Subject: Re: [PATCH v2 4/5] [RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of instructions
Date: Thu, 15 Oct 2020 10:00:40 -0700 [thread overview]
Message-ID: <9d7e10ff-b560-4f16-9f53-516dc26156a0@linaro.org> (raw)
In-Reply-To: <20201015152139.28903-4-space.monkey.delivers@gmail.com>
On 10/15/20 8:21 AM, Alexey Baturo wrote:
> Signed-off-by: Alexey Baturo <space.monkey.delivers@gmail.com>
> ---
> target/riscv/insn_trans/trans_rva.c.inc | 3 +++
> target/riscv/insn_trans/trans_rvd.c.inc | 2 ++
> target/riscv/insn_trans/trans_rvf.c.inc | 2 ++
> target/riscv/insn_trans/trans_rvi.c.inc | 2 ++
> target/riscv/translate.c | 14 ++++++++++++++
> 5 files changed, 23 insertions(+)
Looks ok.
It does occur to me to wonder how this is intended to work with unaligned
addresses, or large memory operations such as with RVV.
Without changes in the generic tcg code, an unaligned memory op that crosses
the mask will not wrap the second half. E.g.
upmbase = 0
upmmask = 0xffff
address = 0xfffe
size = 8
will read [0x10005 : 0xfffe] and not
[0x0005 : 0x0000] | [0xffff : 0xfffe] as a true wrapping would lead you do believe.
r~
next prev parent reply other threads:[~2020-10-15 17:12 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-15 15:21 [PATCH v2 1/5] [RISCV_PM] Add J-extension into RISC-V Alexey Baturo
2020-10-15 15:21 ` [PATCH v2 2/5] [RISCV_PM] Support CSRs required for RISC-V PM extension except for ones in hypervisor mode Alexey Baturo
2020-10-15 16:48 ` Richard Henderson
2020-10-15 17:28 ` Alexey Baturo
2020-10-15 18:05 ` Alexey Baturo
2020-10-16 17:16 ` Richard Henderson
2020-10-15 15:21 ` [PATCH v2 3/5] [RISCV_PM] Print new PM CSRs in QEMU logs Alexey Baturo
2020-10-15 15:21 ` [PATCH v2 4/5] [RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of instructions Alexey Baturo
2020-10-15 17:00 ` Richard Henderson [this message]
2020-10-15 17:30 ` Alexey Baturo
2020-10-15 15:21 ` [PATCH v2 5/5] [RISCV_PM] Implement address masking functions required for RISC-V Pointer Masking extension Alexey Baturo
2020-10-15 17:07 ` Richard Henderson
2020-10-15 17:33 ` Alexey Baturo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=9d7e10ff-b560-4f16-9f53-516dc26156a0@linaro.org \
--to=richard.henderson@linaro.org \
--cc=Alistair.Francis@wdc.com \
--cc=baturo.alexey@gmail.com \
--cc=kbastian@mail.uni-paderborn.de \
--cc=kupokupokupopo@gmail.com \
--cc=palmer@dabbelt.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=sagark@eecs.berkeley.edu \
--cc=space.monkey.delivers@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).