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From: Paolo Bonzini <pbonzini@redhat.com>
To: Sean Christopherson <seanjc@google.com>
Cc: Zhenzhong Duan <zhenzhong.duan@intel.com>,
	qemu-devel@nongnu.org, mtosatti@redhat.com, likexu@tencent.com,
	xiangfeix.ma@intel.com
Subject: Re: [PATCH] i386: Disable BTS and PEBS
Date: Tue, 19 Jul 2022 20:18:47 +0200	[thread overview]
Message-ID: <9dbe748c-57b4-eab5-3933-0e9891b031c1@redhat.com> (raw)
In-Reply-To: <YtW+ymE654W662X4@google.com>

On 7/18/22 22:12, Sean Christopherson wrote:
> On Mon, Jul 18, 2022, Paolo Bonzini wrote:
>> This needs to be fixed in the kernel because old QEMU/new KVM is supported.
> 
> I can't object to adding a quirk for this since KVM is breaking userspace, but on
> the KVM side we really need to stop "sanitizing" userspace inputs unless it puts
> the host at risk, because inevitably it leads to needing a quirk.

The problem is not the sanitizing, it's that userspace literally cannot 
know that this needs to be done because the feature bits are "backwards" 
(1 = unavailable).

The right way to fix it is probably to use feature MSRs and, by default, 
leave the features marked as unavailable.  I'll think it through and 
post a patch tomorrow for both KVM and QEMU (to enable PEBS).

>> But apart from that, where does Linux check MSR_IA32_MISC_ENABLE_BTS_UNAVAIL
>> and MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL?
> 
> The kernel uses synthetic feature flags that are set by:
> 
>    static void init_intel(struct cpuinfo_x86 *c)
> 
> 	if (boot_cpu_has(X86_FEATURE_DS)) {
> 		unsigned int l1, l2;
> 
> 		rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
> 		if (!(l1 & (1<<11)))
> 			set_cpu_cap(c, X86_FEATURE_BTS);
> 		if (!(l1 & (1<<12)))
> 			set_cpu_cap(c, X86_FEATURE_PEBS);
> 	}

Gah, shift constants are evil.   I sent 
https://lore.kernel.org/all/20220719174714.2410374-1-pbonzini@redhat.com/ to 
clean this up.

Paolo

> and consumed by:
> 
>    void __init intel_ds_init(void)
> 
> 	/*
> 	 * No support for 32bit formats
> 	 */
> 	if (!boot_cpu_has(X86_FEATURE_DTES64))
> 		return;
> 
> 	x86_pmu.bts  = boot_cpu_has(X86_FEATURE_BTS);
> 	x86_pmu.pebs = boot_cpu_has(X86_FEATURE_PEBS);
> 	x86_pmu.pebs_buffer_size = PEBS_BUFFER_SIZE;
> 



  reply	other threads:[~2022-07-19 18:34 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-18  3:22 [PATCH] i386: Disable BTS and PEBS Zhenzhong Duan
2022-07-18  3:57 ` Like Xu
2022-07-18  7:44   ` Duan, Zhenzhong
2022-07-18 16:08 ` Paolo Bonzini
2022-07-18 20:12   ` Sean Christopherson
2022-07-19 18:18     ` Paolo Bonzini [this message]
2022-07-19 18:53       ` Sean Christopherson
2022-07-20  2:35         ` Duan, Zhenzhong
2022-07-20 15:48           ` Sean Christopherson
2022-07-21  2:42         ` Like Xu
2022-08-19  1:38       ` Duan, Zhenzhong

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