Re: [Qemu-devel] [PATCH v5] target/arm: generate a custom MIDR for -cpu max

[Richard Henderson <richard.henderson@linaro.org>]

On 7/26/19 4:39 AM, Alex Bennée wrote:
> While most features are now detected by probing the ID_* registers
> kernels can (and do) use MIDR_EL1 for working out of they have to
> apply errata. This can trip up warnings in the kernel as it tries to
> work out if it should apply workarounds to features that don't
> actually exist in the reported CPU type.
> 
> Avoid this problem by synthesising our own MIDR value.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> 
> ---
> v2
>   - don't leak QEMU version into ID reg
> v3
>   - move comment into one block
>   - explicit setting of more fields
> v4
>   - minor reword of comment
> v5
>   - VARIANT->PARTNUM and extra words
> ---
>  target/arm/cpu.h   |  6 ++++++
>  target/arm/cpu64.c | 19 +++++++++++++++++++
>  2 files changed, 25 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~