From: Thomas Huth <thuth@redhat.com>
To: Arnaud Minier <arnaud.minier@telecom-paris.fr>, qemu-devel@nongnu.org
Cc: "Laurent Vivier" <lvivier@redhat.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
qemu-arm@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
"Alistair Francis" <alistair@alistair23.me>,
"Inès Varhol" <ines.varhol@telecom-paris.fr>,
"Samuel Tardieu" <samuel.tardieu@telecom-paris.fr>,
"Peter Maydell" <peter.maydell@linaro.org>
Subject: Re: [PATCH v2 6/6] tests/qtest: Add tests for the STM32L4x5 USART
Date: Mon, 25 Mar 2024 07:19:24 +0100 [thread overview]
Message-ID: <9e6142e9-83b1-465d-b29a-01f60f9cbc49@redhat.com> (raw)
In-Reply-To: <20240324165545.201908-7-arnaud.minier@telecom-paris.fr>
Hi!
On 24/03/2024 17.55, Arnaud Minier wrote:
> Test:
> - read/write from/to the usart registers
> - send/receive a character/string over the serial port
>
> Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
> ---
> tests/qtest/meson.build | 3 +-
> tests/qtest/stm32l4x5_usart-test.c | 326 +++++++++++++++++++++++++++++
> 2 files changed, 328 insertions(+), 1 deletion(-)
> create mode 100644 tests/qtest/stm32l4x5_usart-test.c
>
> diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
> index 36c5c13a7b..e0d72ee91e 100644
> --- a/tests/qtest/meson.build
> +++ b/tests/qtest/meson.build
> @@ -205,7 +205,8 @@ qtests_stm32l4x5 = \
> ['stm32l4x5_exti-test',
> 'stm32l4x5_syscfg-test',
> 'stm32l4x5_rcc-test',
> - 'stm32l4x5_gpio-test']
> + 'stm32l4x5_gpio-test',
> + 'stm32l4x5_usart-test']
We are now using timeouts from the meson test harneess in meson.build, too,
see the slow_qtests[] at the beginning of that file.
You seem to be using a 10 minutes timeout in your test below
(usart_wait_for_flag() function), but you didn't adjust the meson timeout
setting in meson.build, so this does not quite match...
How long does your test take on a very loaded machine (with --enable-debug
used)? If it could take more than 30 seconds, you need to adjust the timeout
in meson.build, too. If it is running very fast, you should likely adjust
the 10 minutes timeout in usart_wait_for_flag() to < 30 seconds instead to
match the meson timeout setting.
> qtests_arm = \
> (config_all_devices.has_key('CONFIG_MPS2') ? ['sse-timer-test'] : []) + \
> diff --git a/tests/qtest/stm32l4x5_usart-test.c b/tests/qtest/stm32l4x5_usart-test.c
> new file mode 100644
> index 0000000000..2d42f053f6
> --- /dev/null
> +++ b/tests/qtest/stm32l4x5_usart-test.c
> @@ -0,0 +1,326 @@
> +/*
> + * QTest testcase for STML4X5_USART
> + *
> + * Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr>
> + * Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr>
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + */
> +
> +#include "qemu/osdep.h"
> +#include "libqtest.h"
> +#include "hw/misc/stm32l4x5_rcc_internals.h"
> +#include "hw/registerfields.h"
> +
> +#define RCC_BASE_ADDR 0x40021000
> +/* Use USART 1 ADDR, assume the others work the same */
> +#define USART1_BASE_ADDR 0x40013800
> +
> +/* See stm32l4x5_usart for definitions */
> +REG32(CR1, 0x00)
> + FIELD(CR1, M1, 28, 1)
> + FIELD(CR1, OVER8, 15, 1)
> + FIELD(CR1, M0, 12, 1)
> + FIELD(CR1, PCE, 10, 1)
> + FIELD(CR1, TXEIE, 7, 1)
> + FIELD(CR1, RXNEIE, 5, 1)
> + FIELD(CR1, TE, 3, 1)
> + FIELD(CR1, RE, 2, 1)
> + FIELD(CR1, UE, 0, 1)
> +REG32(CR2, 0x04)
> +REG32(CR3, 0x08)
> + FIELD(CR3, OVRDIS, 12, 1)
> +REG32(BRR, 0x0C)
> +REG32(GTPR, 0x10)
> +REG32(RTOR, 0x14)
> +REG32(RQR, 0x18)
> +REG32(ISR, 0x1C)
> + FIELD(ISR, TXE, 7, 1)
> + FIELD(ISR, RXNE, 5, 1)
> + FIELD(ISR, ORE, 3, 1)
> +REG32(ICR, 0x20)
> +REG32(RDR, 0x24)
> +REG32(TDR, 0x28)
> +
> +#define NVIC_ISPR1 0XE000E204
> +#define NVIC_ICPR1 0xE000E284
> +#define USART1_IRQ 37
> +
> +static bool check_nvic_pending(QTestState *qts, unsigned int n)
> +{
> + /* No USART interrupts are less than 32 */
> + assert(n > 32);
> + n -= 32;
> + return qtest_readl(qts, NVIC_ISPR1) & (1 << n);
> +}
> +
> +static bool clear_nvic_pending(QTestState *qts, unsigned int n)
> +{
> + /* No USART interrupts are less than 32 */
> + assert(n > 32);
> + n -= 32;
> + qtest_writel(qts, NVIC_ICPR1, (1 << n));
> + return true;
I'd suggest to change the return type to "void" and drop the "return true" here.
> +}
> +
> +/*
> + Tests should never need to sleep(), because while it might be plenty of time on a
> + fast development machine, it can cause intermittent failures due
> + to timeouts if the test is on some heavily-loaded slow CI runner.
> + */
> +static bool usart_wait_for_flag(QTestState *qts, uint32_t event_addr, uint32_t flag)
> +{
> + /* Wait at most 10 minutes */
> + for (int i = 0; i < 600000; i++) {
> + if ((qtest_readl(qts, event_addr) & flag)) {
> + return true;
> + }
> + g_usleep(1000);
As I recently learnt again, some systems (like some BSD kernels) still use a
time slice resolution of 10 ms, so it might be better to g_usleep(10000) and
adjust the loop counter to a value that is 10 times less instead, otherwise
your loop might 100 minutes instead of 10 minutes in the worst case instead.
> + }
> +
> + return false;
> +}
Thomas
next prev parent reply other threads:[~2024-03-25 6:20 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-24 16:55 [PATCH v2 0/6] hw/char: Implement the STM32L4x5 USART, UART and LPUART Arnaud Minier
2024-03-24 16:55 ` [PATCH v2 1/6] hw/misc/stm32l4x5_rcc: Propagate period when enabling a clock Arnaud Minier
2024-03-24 16:55 ` [PATCH v2 2/6] hw/char: Implement STM32L4x5 USART skeleton Arnaud Minier
2024-03-28 15:55 ` Peter Maydell
2024-03-24 16:55 ` [PATCH v2 3/6] hw/char/stm32l4x5_usart: Enable serial read and write Arnaud Minier
2024-03-28 15:59 ` Peter Maydell
2024-03-24 16:55 ` [PATCH v2 4/6] hw/char/stm32l4x5_usart: Add options for serial parameters setting Arnaud Minier
2024-03-28 16:03 ` Peter Maydell
2024-03-24 16:55 ` [PATCH v2 5/6] hw/arm: Add the USART to the stm32l4x5 SoC Arnaud Minier
2024-03-28 16:06 ` Peter Maydell
2024-03-24 16:55 ` [PATCH v2 6/6] tests/qtest: Add tests for the STM32L4x5 USART Arnaud Minier
2024-03-25 6:19 ` Thomas Huth [this message]
2024-03-28 16:14 ` Peter Maydell
2024-03-28 16:10 ` [PATCH v2 0/6] hw/char: Implement the STM32L4x5 USART, UART and LPUART Peter Maydell
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