qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Logan Gunthorpe <logang@deltatee.com>
To: Guenter Roeck <linux@roeck-us.net>, Palmer Dabbelt <palmer@sifive.com>
Cc: alistair23@gmail.com, qemu-riscv@nongnu.org,
	Alistair Francis <Alistair.Francis@wdc.com>,
	qemu-devel@nongnu.org, abologna@redhat.com
Subject: Re: [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe
Date: Wed, 21 Nov 2018 16:26:01 -0700	[thread overview]
Message-ID: <9ee74477-105f-db2e-b69c-e67d485b9c2f@deltatee.com> (raw)
In-Reply-To: <20181121231005.GB1421@roeck-us.net>



On 2018-11-21 4:10 p.m., Guenter Roeck wrote:
> FWIW, I absoutely agree. If the board can only be used to boot an initrd,
> it is quite pointless to have it around. Actually it is worse than pointless,
> since it will result in people wasting their time trying to get it to work.

As someone who has wasted their time on it, I second this sentiment.

Logan

  reply	other threads:[~2018-11-21 23:26 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-21 17:02 [Qemu-devel] [PATCH for-3.2 v7 0/6] Connect a PCIe host and graphics support to RISC-V Alistair Francis
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts Alistair Francis
2018-11-21 17:58   ` Logan Gunthorpe
2018-11-21 18:17     ` Alistair Francis
2018-11-21 18:45       ` Logan Gunthorpe
2018-11-21 18:49         ` Alistair Francis
2018-11-21 18:56           ` Logan Gunthorpe
2018-11-21 18:59             ` Alistair Francis
2018-11-21 19:02               ` Logan Gunthorpe
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 2/6] hw/riscv/virt: Adjust memory layout spacing Alistair Francis
2018-11-21 17:59   ` Logan Gunthorpe
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 3/6] hw/riscv/virt: Connect the gpex PCIe Alistair Francis
2018-11-21 18:01   ` Logan Gunthorpe
2018-11-21 18:21     ` Alistair Francis
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 4/6] riscv: Enable VGA and PCIE_VGA Alistair Francis
2018-11-21 18:01   ` Logan Gunthorpe
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe Alistair Francis
2018-11-21 18:05   ` Logan Gunthorpe
2018-11-21 18:32     ` Alistair Francis
2018-11-21 18:50       ` Logan Gunthorpe
2018-11-21 19:02         ` Alistair Francis
2018-11-21 19:08           ` Logan Gunthorpe
2018-11-21 19:16             ` Alistair Francis
2018-11-21 19:19               ` Logan Gunthorpe
2018-11-21 19:21                 ` Alistair Francis
2018-11-21 19:24                   ` Logan Gunthorpe
2018-11-21 19:51                     ` Alistair Francis
2018-11-21 21:54                       ` Alistair Francis
2018-11-21 22:01                         ` Logan Gunthorpe
2018-11-21 22:09                           ` Alistair Francis
2018-11-21 22:11                             ` Logan Gunthorpe
2018-11-21 22:15                           ` Palmer Dabbelt
2018-11-21 21:37                   ` Palmer Dabbelt
2018-11-21 22:01                     ` Alistair Francis
2018-11-21 22:15                       ` Palmer Dabbelt
2018-11-21 19:15           ` Logan Gunthorpe
2018-11-21 19:18             ` Alistair Francis
2018-11-21 19:20               ` Logan Gunthorpe
2018-11-21 21:26       ` Palmer Dabbelt
2018-11-21 21:49         ` Alistair Francis
2018-11-21 22:15           ` Palmer Dabbelt
2018-11-21 22:23             ` Alistair Francis
2018-11-21 22:36               ` Palmer Dabbelt
2018-11-21 23:10                 ` Guenter Roeck
2018-11-21 23:26                   ` Logan Gunthorpe [this message]
2018-11-22  2:13                     ` Palmer Dabbelt
2018-11-22  2:23                       ` Alistair Francis
2018-11-26 19:15                         ` Palmer Dabbelt
2018-11-21 18:36     ` Guenter Roeck
2018-11-21 18:55       ` Logan Gunthorpe
2018-11-21 17:03 ` [Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device Alistair Francis
2018-11-21 18:07   ` Logan Gunthorpe
2018-11-21 18:34     ` Alistair Francis
2018-11-21 19:11       ` Logan Gunthorpe
2018-11-21 21:55         ` Alistair Francis
2018-11-21 22:07           ` Logan Gunthorpe
2018-11-21 22:11             ` Alistair Francis
2018-11-21 22:14               ` Alistair Francis
2018-11-21 22:16                 ` Logan Gunthorpe
2018-11-21 22:18                   ` Logan Gunthorpe
2018-11-22 10:59 ` [Qemu-devel] [PATCH for-3.2 v7 0/6] Connect a PCIe host and graphics support to RISC-V Andrea Bolognani
2018-11-26 16:03   ` Alistair Francis
2018-11-26 19:34   ` Palmer Dabbelt
2018-11-26 21:33     ` Guenter Roeck
2018-11-27 12:40     ` Andrea Bolognani

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=9ee74477-105f-db2e-b69c-e67d485b9c2f@deltatee.com \
    --to=logang@deltatee.com \
    --cc=Alistair.Francis@wdc.com \
    --cc=abologna@redhat.com \
    --cc=alistair23@gmail.com \
    --cc=linux@roeck-us.net \
    --cc=palmer@sifive.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).