messages from 2021-10-28 23:44:36 to 2021-10-29 11:30:04 UTC [more...]
[PATCH v4 00/22] monitor: explicitly permit QMP commands to be added for all use cases
2021-10-29 11:28 UTC (7+ messages)
` [PATCH v4 01/22] monitor: remove 'info ioapic' HMP command
` [PATCH v4 12/22] qapi: introduce x-query-numa QMP command
` [PATCH v4 14/22] qapi: introduce x-query-rdma "
[PATCH v2 0/9] Configurable policy for handling unstable interfaces
2021-10-29 10:44 UTC (7+ messages)
` [PATCH v2 4/9] qapi: Tools for sets of special feature flags in generated code
` [PATCH v2 5/9] qapi: Generalize struct member policy checking
` [PATCH v2 6/9] qapi: Generalize command "
[PATCH v9 00/76] support vector extension v1.0
2021-10-29 8:59 UTC (77+ messages)
` [PATCH v9 01/76] target/riscv: drop vector 0.7.1 and add 1.0 support
` [PATCH v9 02/76] target/riscv: Use FIELD_EX32() to extract wd field
` [PATCH v9 03/76] target/riscv: rvv-1.0: add mstatus VS field
` [PATCH v9 04/76] target/riscv: rvv-1.0: set mstatus.SD bit if mstatus.VS is dirty
` [PATCH v9 05/76] target/riscv: rvv-1.0: add sstatus VS field
` [PATCH v9 06/76] target/riscv: rvv-1.0: introduce writable misa.v field
` [PATCH v9 07/76] target/riscv: rvv-1.0: add translation-time vector context status
` [PATCH v9 08/76] target/riscv: rvv-1.0: remove rvv related codes from fcsr registers
` [PATCH v9 09/76] target/riscv: rvv-1.0: add vcsr register
` [PATCH v9 10/76] target/riscv: rvv-1.0: add vlenb register
` [PATCH v9 11/76] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers
` [PATCH v9 12/76] target/riscv: rvv-1.0: remove MLEN calculations
` [PATCH v9 13/76] target/riscv: rvv-1.0: add fractional LMUL
` [PATCH v9 14/76] target/riscv: rvv-1.0: add VMA and VTA
` [PATCH v9 15/76] target/riscv: rvv-1.0: update check functions
` [PATCH v9 16/76] target/riscv: introduce more imm value modes in translator functions
` [PATCH v9 17/76] target/riscv: rvv:1.0: add translation-time nan-box helper function
` [PATCH v9 18/76] target/riscv: rvv-1.0: remove amo operations instructions
` [PATCH v9 19/76] target/riscv: rvv-1.0: configure instructions
` [PATCH v9 20/76] target/riscv: rvv-1.0: stride load and store instructions
` [PATCH v9 21/76] target/riscv: rvv-1.0: index "
` [PATCH v9 22/76] target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns
` [PATCH v9 23/76] target/riscv: rvv-1.0: fault-only-first unit stride load
` [PATCH v9 24/76] target/riscv: rvv-1.0: load/store whole register instructions
` [PATCH v9 25/76] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns
` [PATCH v9 26/76] target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation
` [PATCH v9 27/76] target/riscv: rvv-1.0: floating-point square-root instruction
` [PATCH v9 28/76] target/riscv: rvv-1.0: floating-point classify instructions
` [PATCH v9 29/76] target/riscv: rvv-1.0: count population in mask instruction
` [PATCH v9 30/76] target/riscv: rvv-1.0: find-first-set mask bit instruction
` [PATCH v9 31/76] target/riscv: rvv-1.0: set-X-first mask bit instructions
` [PATCH v9 32/76] target/riscv: rvv-1.0: iota instruction
` [PATCH v9 33/76] target/riscv: rvv-1.0: element index instruction
` [PATCH v9 34/76] target/riscv: rvv-1.0: allow load element with sign-extended
` [PATCH v9 35/76] target/riscv: rvv-1.0: register gather instructions
` [PATCH v9 36/76] target/riscv: rvv-1.0: integer scalar move instructions
` [PATCH v9 37/76] target/riscv: rvv-1.0: floating-point move instruction
` [PATCH v9 38/76] target/riscv: rvv-1.0: floating-point scalar move instructions
` [PATCH v9 39/76] target/riscv: rvv-1.0: whole register "
` [PATCH v9 40/76] target/riscv: rvv-1.0: integer extension instructions
` [PATCH v9 41/76] target/riscv: rvv-1.0: single-width averaging add and subtract instructions
` [PATCH v9 42/76] target/riscv: rvv-1.0: single-width bit shift instructions
` [PATCH v9 43/76] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow
` [PATCH v9 44/76] target/riscv: rvv-1.0: narrowing integer right shift instructions
` [PATCH v9 45/76] target/riscv: rvv-1.0: widening integer multiply-add instructions
` [PATCH v9 46/76] target/riscv: rvv-1.0: single-width saturating add and subtract instructions
` [PATCH v9 47/76] target/riscv: rvv-1.0: integer comparison instructions
` [PATCH v9 48/76] target/riscv: rvv-1.0: floating-point compare instructions
` [PATCH v9 49/76] target/riscv: rvv-1.0: mask-register logical instructions
` [PATCH v9 50/76] target/riscv: rvv-1.0: slide instructions
` [PATCH v9 51/76] target/riscv: rvv-1.0: floating-point "
` [PATCH v9 52/76] target/riscv: rvv-1.0: narrowing fixed-point clip instructions
` [PATCH v9 53/76] target/riscv: rvv-1.0: single-width floating-point reduction
` [PATCH v9 54/76] target/riscv: rvv-1.0: widening floating-point reduction instructions
` [PATCH v9 55/76] target/riscv: rvv-1.0: single-width scaling shift instructions
` [PATCH v9 56/76] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add
` [PATCH v9 57/76] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf
` [PATCH v9 58/76] target/riscv: rvv-1.0: remove integer extract instruction
` [PATCH v9 59/76] target/riscv: rvv-1.0: floating-point min/max instructions
` [PATCH v9 60/76] target/riscv: introduce floating-point rounding mode enum
` [PATCH v9 61/76] target/riscv: rvv-1.0: floating-point/integer type-convert instructions
` [PATCH v9 62/76] target/riscv: rvv-1.0: widening floating-point/integer type-convert
` [PATCH v9 63/76] target/riscv: add "set round to odd" rounding mode helper function
` [PATCH v9 64/76] target/riscv: rvv-1.0: narrowing floating-point/integer type-convert
` [PATCH v9 65/76] target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits
` [PATCH v9 66/76] target/riscv: rvv-1.0: implement vstart CSR
` [PATCH v9 67/76] target/riscv: rvv-1.0: trigger illegal instruction exception if frm is not valid
` [PATCH v9 68/76] target/riscv: gdb: support vector registers for rv64 & rv32
` [PATCH v9 69/76] target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruction
` [PATCH v9 70/76] target/riscv: rvv-1.0: floating-point reciprocal "
` [PATCH v9 71/76] target/riscv: rvv-1.0: rename r2_zimm to r2_zimm11
` [PATCH v9 72/76] target/riscv: rvv-1.0: add vsetivli instruction
` [PATCH v9 73/76] target/riscv: rvv-1.0: add evl parameter to vext_ldst_us()
` [PATCH v9 74/76] target/riscv: rvv-1.0: add vector unit-stride mask load/store insns
` [PATCH v9 75/76] target/riscv: rvv-1.0: rename vmandnot.mm and vmornot.mm to vmandn.mm and vmorn.mm
` [PATCH v9 76/76] target/riscv: rvv-1.0: update opivv_vadc_check() comment
[PATCH v4] migration/rdma: Fix out of order wrid
2021-10-29 10:16 UTC (2+ messages)
[PATCH] meson.build: Allow to disable OSS again
2021-10-29 9:32 UTC (2+ messages)
Possible reward for fuzzer bug fixes? Secure Open Source Rewards Program
2021-10-29 8:53 UTC (2+ messages)
[PATCH] pci: fix PCI resource reserve capability on BE
2021-10-29 8:50 UTC (2+ messages)
[PATCH V5 0/3] net/filter: Optimize filters vnet_hdr support
2021-10-29 8:08 UTC (4+ messages)
` [PATCH V5 1/3] net/filter: Optimize transfer protocol for filter-mirror/redirector
[Qemu-devel] [Bug 1802915] [NEW] GTK display refresh rate is throttled
2021-10-29 7:41 UTC (2+ messages)
` [Bug 1802915] "
[PATCH v2 0/5] pci/iommu: Fail early if vfio-pci detected before vIOMMU
2021-10-29 2:53 UTC (8+ messages)
` [PATCH v2 2/5] pci: Export pci_for_each_device_under_bus*()
` [PATCH v2 5/5] pc/q35: Add pre-plug hook for x86-iommu
[PULL v2 00/18] riscv-to-apply queue
2021-10-29 7:08 UTC (19+ messages)
` [PULL v2 01/18] hw/riscv: virt: Don't use a macro for the PLIC configuration
` [PULL v2 02/18] hw/riscv: boot: Add a PLIC config string function
` [PULL v2 03/18] hw/riscv: sifive_u: Use the PLIC config helper function
` [PULL v2 04/18] hw/riscv: microchip_pfsoc: "
` [PULL v2 05/18] hw/riscv: virt: "
` [PULL v2 06/18] hw/riscv: opentitan: Fixup the PLIC context addresses
` [PULL v2 07/18] target/riscv: Add J-extension into RISC-V
` [PULL v2 08/18] target/riscv: Add CSR defines for RISC-V PM extension
` [PULL v2 09/18] target/riscv: Support CSRs required for RISC-V PM extension except for the h-mode
` [PULL v2 10/18] target/riscv: Add J extension state description
` [PULL v2 11/18] target/riscv: Print new PM CSRs in QEMU logs
` [PULL v2 12/18] target/riscv: Support pointer masking for RISC-V for i/c/f/d/a types of instructions
` [PULL v2 13/18] target/riscv: Implement address masking functions required for RISC-V Pointer Masking extension
` [PULL v2 14/18] target/riscv: Allow experimental J-ext to be turned on
` [PULL v2 15/18] target/riscv: fix VS interrupts forwarding to HS
` [PULL v2 16/18] target/riscv: remove force HS exception
` [PULL v2 17/18] softfloat: add APIs to handle alternative sNaN propagation for fmax/fmin
` [PULL v2 18/18] target/riscv: change the api for RVF/RVD fmin/fmax
[PATCH 00/31] Add Loongarch softmmu support
2021-10-29 7:01 UTC (6+ messages)
` [PATCH 08/31] target/loongarch: Add tlb instruction support
` [PATCH 07/31] target/loongarch: Add loongarch csr/iocsr "
[PATCH v3 0/2] hw/core/machine: Add an unit test for smp_parse
2021-10-29 6:28 UTC (3+ messages)
[PATCH v4 00/23] More SH4 clean ups
2021-10-29 6:05 UTC (22+ messages)
` [PATCH v4 22/23] hw/timer/sh_timer: Do not wrap lines that are not too long
` [PATCH v4 13/23] hw/intc/sh_intc: Remove excessive parenthesis
` [PATCH v4 20/23] hw/timer/sh_timer: Rename sh_timer_state to SHTimerState
` [PATCH v4 16/23] hw/intc/sh_intc: Replace abort() with g_assert_not_reached()
` [PATCH v4 12/23] hw/intc/sh_intc: Move sh_intc_register() closer to its only user
` [PATCH v4 06/23] hw/char/sh_serial: QOM-ify
` [PATCH v4 18/23] hw/intc/sh_intc: Simplify allocating sources array
` [PATCH v4 02/23] hw/char/sh_serial: Use hw_error instead of fprintf and abort
` [PATCH v4 14/23] hw/intc/sh_intc: Use array index instead of pointer arithmetics
` [PATCH v4 10/23] hw/intc/sh_intc: Rename iomem region
[PATCH] hvf: Use standard CR0 and CR4 register definitions
2021-10-29 6:09 UTC (2+ messages)
[PATCH 0/4] configure and meson.build improvements
2021-10-29 6:09 UTC (3+ messages)
` [PATCH 4/4] Move the libssh setup from configure to meson.build
[PULL v2 00/60] tcg patch queue
2021-10-29 4:33 UTC (61+ messages)
` [PULL v2 01/60] qemu/int128: Add int128_{not,xor}
` [PULL v2 02/60] host-utils: move checks out of divu128/divs128
` [PULL v2 03/60] host-utils: move udiv_qrnnd() to host-utils
` [PULL v2 04/60] host-utils: add 128-bit quotient support to divu128/divs128
` [PULL v2 05/60] host-utils: add unit tests for divu128/divs128
` [PULL v2 06/60] tcg/optimize: Rename "mask" to "z_mask"
` [PULL v2 07/60] tcg/optimize: Split out OptContext
` [PULL v2 08/60] tcg/optimize: Remove do_default label
` [PULL v2 09/60] tcg/optimize: Change tcg_opt_gen_{mov, movi} interface
` [PULL v2 10/60] tcg/optimize: Move prev_mb into OptContext
` [PULL v2 11/60] tcg/optimize: Split out init_arguments
` [PULL v2 12/60] tcg/optimize: Split out copy_propagate
` [PULL v2 13/60] tcg/optimize: Split out fold_call
` [PULL v2 14/60] tcg/optimize: Drop nb_oargs, nb_iargs locals
` [PULL v2 15/60] tcg/optimize: Change fail return for do_constant_folding_cond*
` [PULL v2 16/60] tcg/optimize: Return true from tcg_opt_gen_{mov, movi}
` [PULL v2 17/60] tcg/optimize: Split out finish_folding
` [PULL v2 18/60] tcg/optimize: Use a boolean to avoid a mass of continues
` [PULL v2 19/60] tcg/optimize: Split out fold_mb, fold_qemu_{ld,st}
` [PULL v2 20/60] tcg/optimize: Split out fold_const{1,2}
` [PULL v2 21/60] tcg/optimize: Split out fold_setcond2
` [PULL v2 22/60] tcg/optimize: Split out fold_brcond2
` [PULL v2 23/60] tcg/optimize: Split out fold_brcond
` [PULL v2 24/60] tcg/optimize: Split out fold_setcond
` [PULL v2 25/60] tcg/optimize: Split out fold_mulu2_i32
` [PULL v2 26/60] tcg/optimize: Split out fold_addsub2_i32
` [PULL v2 27/60] tcg/optimize: Split out fold_movcond
` [PULL v2 28/60] tcg/optimize: Split out fold_extract2
` [PULL v2 29/60] tcg/optimize: Split out fold_extract, fold_sextract
` [PULL v2 30/60] tcg/optimize: Split out fold_deposit
` [PULL v2 31/60] tcg/optimize: Split out fold_count_zeros
` [PULL v2 32/60] tcg/optimize: Split out fold_bswap
` [PULL v2 33/60] tcg/optimize: Split out fold_dup, fold_dup2
` [PULL v2 34/60] tcg/optimize: Split out fold_mov
` [PULL v2 35/60] tcg/optimize: Split out fold_xx_to_i
` [PULL v2 36/60] tcg/optimize: Split out fold_xx_to_x
` [PULL v2 37/60] tcg/optimize: Split out fold_xi_to_i
` [PULL v2 38/60] tcg/optimize: Add type to OptContext
` [PULL v2 39/60] tcg/optimize: Split out fold_to_not
` [PULL v2 40/60] tcg/optimize: Split out fold_sub_to_neg
` [PULL v2 41/60] tcg/optimize: Split out fold_xi_to_x
` [PULL v2 42/60] tcg/optimize: Split out fold_ix_to_i
` [PULL v2 43/60] tcg/optimize: Split out fold_masks
` [PULL v2 44/60] tcg/optimize: Expand fold_mulu2_i32 to all 4-arg multiplies
` [PULL v2 45/60] tcg/optimize: Expand fold_addsub2_i32 to 64-bit ops
` [PULL v2 46/60] tcg/optimize: Sink commutative operand swapping into fold functions
` [PULL v2 47/60] tcg: Extend call args using the correct opcodes
` [PULL v2 48/60] tcg/optimize: Stop forcing z_mask to "garbage" for 32-bit values
` [PULL v2 49/60] tcg/optimize: Use fold_xx_to_i for orc
` [PULL v2 50/60] tcg/optimize: Use fold_xi_to_x for mul
` [PULL v2 51/60] tcg/optimize: Use fold_xi_to_x for div
` [PULL v2 52/60] tcg/optimize: Use fold_xx_to_i for rem
` [PULL v2 53/60] tcg/optimize: Optimize sign extensions
` [PULL v2 54/60] tcg/optimize: Propagate sign info for logical operations
` [PULL v2 55/60] tcg/optimize: Propagate sign info for setcond
` [PULL v2 56/60] tcg/optimize: Propagate sign info for bit counting
` [PULL v2 57/60] tcg/optimize: Propagate sign info for shifting
` [PULL v2 58/60] softmmu: fix watchpoint processing in icount mode
` [PULL v2 59/60] softmmu: remove useless condition in watchpoint check
` [PULL v2 60/60] softmmu: fix for "after access" watchpoints
[PATCH 00/24] bsd-user: arm (32-bit) support
2021-10-29 4:34 UTC (5+ messages)
` [PATCH 22/24] bsd-user/arm/target_arch_signal.h: arm set_mcontext
[PULL 0/2] Hexagon (target/hexagon) cleanup and bug fix
2021-10-29 4:02 UTC (3+ messages)
` [PULL 1/2] Hexagon (target/hexagon) more tcg_constant_*
` [PULL 2/2] Hexagon (target/hexagon) put writes to USR into temp until commit
[PATCH] tests/qtest/virtio-net: fix hotplug test case
2021-10-29 2:35 UTC (2+ messages)
[PATCH v3] migration/rdma: Fix out of order wrid
2021-10-29 1:50 UTC (3+ messages)
[ANNOUNCE] QEMU 6.0.1 Stable released
2021-10-29 0:05 UTC
[PATCH] gmp: Add shortcut to stop command to match cont
2021-10-28 23:38 UTC
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).