messages from 2021-11-26 12:14:14 to 2021-11-29 12:04:29 UTC [more...]
[PATCH v3] target/ppc: fix Hash64 MMU update of PTE bit R
2021-11-29 12:00 UTC (5+ messages)
[RFC PATCH v2 0/5] virtio: early detect 'modern' virtio
2021-11-29 11:59 UTC (3+ messages)
[PATCH for 6.2 v2 0/7] more tcg, plugin, test and build fixes
2021-11-29 11:33 UTC (4+ messages)
` [PATCH v2 2/7] accel/tcg: suppress IRQ check for special TBs
[PATCH 0/2] migration: multifd live migration improvement
2021-11-29 11:20 UTC (14+ messages)
` [PATCH 1/2] multifd: use qemu_sem_timedwait in multifd_recv_thread to avoid waiting forever
` [PATCH 2/2] migration: Set the socket backlog number to reduce the chance of live migration failure
[PATCH for-7.0 v6 00/16] linux-user: simplify safe signal handling
2021-11-29 11:01 UTC (3+ messages)
` [PATCH v6 02/16] linux-user/host/ppc64: Use r11 for signal_pending address
FOSDEM 2022 call for participation
2021-11-29 10:50 UTC
[PATCH v6 00/18] Adding partial support for 128-bit riscv target
2021-11-29 10:47 UTC (21+ messages)
` [PATCH v6 01/18] exec/memop: Adding signedness to quad definitions
` [PATCH v6 02/18] exec/memop: Adding signed quad and octo defines
` [PATCH v6 03/18] qemu/int128: addition of div/rem 128-bit operations
` [PATCH v6 04/18] target/riscv: additional macros to check instruction support
` [PATCH v6 05/18] target/riscv: separation of bitwise logic and arithmetic helpers
` [PATCH v6 06/18] target/riscv: array for the 64 upper bits of 128-bit registers
` [PATCH v6 07/18] target/riscv: setup everything for rv64 to support rv128 execution
` [PATCH v6 08/18] target/riscv: moving some insns close to similar insns
` [PATCH v6 09/18] target/riscv: accessors to registers upper part and 128-bit load/store
` [PATCH v6 10/18] target/riscv: support for 128-bit bitwise instructions
` [PATCH v6 11/18] target/riscv: support for 128-bit U-type instructions
` [PATCH v6 12/18] target/riscv: support for 128-bit shift instructions
` [PATCH v6 13/18] target/riscv: support for 128-bit arithmetic instructions
` [PATCH v6 14/18] target/riscv: support for 128-bit M extension
` [PATCH v6 15/18] target/riscv: adding high part of some csrs
` [PATCH v6 16/18] target/riscv: helper functions to wrap calls to 128-bit csr insns
` [PATCH v6 17/18] target/riscv: modification of the trans_csrxx for 128-bit support
` [PATCH v6 18/18] target/riscv: actual functions to realize crs 128-bit insns
[PATCH] Fix STM32F2XX USART data register readout
2021-11-29 10:46 UTC (2+ messages)
[PULL 0/5] target-arm queue
2021-11-29 10:39 UTC (6+ messages)
` [PULL 1/5] hw/arm/virt: Extend nested and mte checks to hvf
` [PULL 2/5] hw/intc: cannot clear GICv3 ITS CTLR[Enabled] bit
` [PULL 3/5] hw/intc/arm_gicv3: Update cached state after LPI state changes
` [PULL 4/5] hw/intc/arm_gicv3: Add new gicv3_intid_is_special() function
` [PULL 5/5] hw/intc/arm_gicv3: fix handling of LPIs in list registers
[PATCH] gitlab-ci.d/buildtest: Add jobs that run the device-crash-test
2021-11-29 10:07 UTC (3+ messages)
[PATCH for-6.2? 0/2] arm_gicv3: Fix handling of LPIs in list registers
2021-11-29 9:19 UTC (5+ messages)
` [PATCH for-6.2? 1/2] hw/intc/arm_gicv3: Add new gicv3_intid_is_special() function
` [PATCH for-6.2? 2/2] hw/intc/arm_gicv3: fix handling of LPIs in list registers
[PATCH V2 1/2] virtio-balloon: process all in sgs for free_page_vq
2021-11-29 8:43 UTC (3+ messages)
` [PATCH V2 2/2] virtio-balloon: correct used length
[PATCH] intel-iommu: ignore SNP bit in scalable mode
2021-11-29 5:37 UTC (12+ messages)
[PATCH v8 00/10] PMU-EBB support for PPC64 TCG
2021-11-29 4:36 UTC (5+ messages)
` [PATCH v8 05/10] target/ppc: enable PMU counter overflow with cycle events
` [PATCH v8 06/10] target/ppc: enable PMU instruction count
[PATCH v10 00/77] support vector extension v1.0
2021-11-29 3:16 UTC (79+ messages)
` [PATCH v10 01/77] target/riscv: drop vector 0.7.1 and add 1.0 support
` [PATCH v10 02/77] target/riscv: Use FIELD_EX32() to extract wd field
` [PATCH v10 03/77] target/riscv: rvv-1.0: add mstatus VS field
` [PATCH v10 04/77] target/riscv: rvv-1.0: set mstatus.SD bit if mstatus.VS is dirty
` [PATCH v10 05/77] target/riscv: rvv-1.0: add sstatus VS field
` [PATCH v10 06/77] target/riscv: rvv-1.0: introduce writable misa.v field
` [PATCH v10 07/77] target/riscv: rvv-1.0: add translation-time vector context status
` [PATCH v10 08/77] target/riscv: rvv-1.0: remove rvv related codes from fcsr registers
` [PATCH v10 09/77] target/riscv: rvv-1.0: add vcsr register
` [PATCH v10 10/77] target/riscv: rvv-1.0: add vlenb register
` [PATCH v10 11/77] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers
` [PATCH v10 12/77] target/riscv: rvv-1.0: remove MLEN calculations
` [PATCH v10 13/77] target/riscv: rvv-1.0: add fractional LMUL
` [PATCH v10 14/77] target/riscv: rvv-1.0: add VMA and VTA
` [PATCH v10 15/77] target/riscv: rvv-1.0: update check functions
` [PATCH v10 16/77] target/riscv: introduce more imm value modes in translator functions
` [PATCH v10 17/77] target/riscv: rvv:1.0: add translation-time nan-box helper function
` [PATCH v10 18/77] target/riscv: rvv-1.0: remove amo operations instructions
` [PATCH v10 19/77] target/riscv: rvv-1.0: configure instructions
` [PATCH v10 20/77] target/riscv: rvv-1.0: stride load and store instructions
` [PATCH v10 21/77] target/riscv: rvv-1.0: index "
` [PATCH v10 22/77] target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns
` [PATCH v10 23/77] target/riscv: rvv-1.0: fault-only-first unit stride load
` [PATCH v10 24/77] target/riscv: rvv-1.0: load/store whole register instructions
` [PATCH v10 25/77] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns
` [PATCH v10 26/77] target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation
` [PATCH v10 27/77] target/riscv: rvv-1.0: floating-point square-root instruction
` [PATCH v10 28/77] target/riscv: rvv-1.0: floating-point classify instructions
` [PATCH v10 29/77] target/riscv: rvv-1.0: count population in mask instruction
` [PATCH v10 30/77] target/riscv: rvv-1.0: find-first-set mask bit instruction
` [PATCH v10 31/77] target/riscv: rvv-1.0: set-X-first mask bit instructions
` [PATCH v10 32/77] target/riscv: rvv-1.0: iota instruction
` [PATCH v10 33/77] target/riscv: rvv-1.0: element index instruction
` [PATCH v10 34/77] target/riscv: rvv-1.0: allow load element with sign-extended
` [PATCH v10 35/77] target/riscv: rvv-1.0: register gather instructions
` [PATCH v10 36/77] target/riscv: rvv-1.0: integer scalar move instructions
` [PATCH v10 37/77] target/riscv: rvv-1.0: floating-point move instruction
` [PATCH v10 38/77] target/riscv: rvv-1.0: floating-point scalar move instructions
` [PATCH v10 39/77] target/riscv: rvv-1.0: whole register "
` [PATCH v10 40/77] target/riscv: rvv-1.0: integer extension instructions
` [PATCH v10 41/77] target/riscv: rvv-1.0: single-width averaging add and subtract instructions
` [PATCH v10 42/77] target/riscv: rvv-1.0: single-width bit shift instructions
` [PATCH v10 43/77] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow
` [PATCH v10 44/77] target/riscv: rvv-1.0: narrowing integer right shift instructions
` [PATCH v10 45/77] target/riscv: rvv-1.0: widening integer multiply-add instructions
` [PATCH v10 46/77] target/riscv: rvv-1.0: single-width saturating add and subtract instructions
` [PATCH v10 47/77] target/riscv: rvv-1.0: integer comparison instructions
` [PATCH v10 48/77] target/riscv: rvv-1.0: floating-point compare instructions
` [PATCH v10 49/77] target/riscv: rvv-1.0: mask-register logical instructions
` [PATCH v10 50/77] target/riscv: rvv-1.0: slide instructions
` [PATCH v10 51/77] target/riscv: rvv-1.0: floating-point "
` [PATCH v10 52/77] target/riscv: rvv-1.0: narrowing fixed-point clip instructions
` [PATCH v10 53/77] target/riscv: rvv-1.0: single-width floating-point reduction
` [PATCH v10 54/77] target/riscv: rvv-1.0: widening floating-point reduction instructions
` [PATCH v10 55/77] target/riscv: rvv-1.0: single-width scaling shift instructions
` [PATCH v10 56/77] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add
` [PATCH v10 57/77] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf
` [PATCH v10 58/77] target/riscv: rvv-1.0: remove integer extract instruction
` [PATCH v10 59/77] target/riscv: rvv-1.0: floating-point min/max instructions
` [PATCH v10 60/77] target/riscv: introduce floating-point rounding mode enum
` [PATCH v10 61/77] target/riscv: rvv-1.0: floating-point/integer type-convert instructions
` [PATCH v10 62/77] target/riscv: rvv-1.0: widening floating-point/integer type-convert
` [PATCH v10 63/77] target/riscv: add "set round to odd" rounding mode helper function
` [PATCH v10 64/77] target/riscv: rvv-1.0: narrowing floating-point/integer type-convert
` [PATCH v10 65/77] target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits
` [PATCH v10 66/77] target/riscv: rvv-1.0: implement vstart CSR
` [PATCH v10 67/77] target/riscv: rvv-1.0: trigger illegal instruction exception if frm is not valid
` [PATCH v10 68/77] target/riscv: gdb: support vector registers for rv64 & rv32
` [PATCH v10 69/77] target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruction
` [PATCH v10 70/77] target/riscv: rvv-1.0: floating-point reciprocal "
` [PATCH v10 71/77] target/riscv: rvv-1.0: rename r2_zimm to r2_zimm11
` [PATCH v10 72/77] target/riscv: rvv-1.0: add vsetivli instruction
` [PATCH v10 73/77] target/riscv: rvv-1.0: add evl parameter to vext_ldst_us()
` [PATCH v10 74/77] target/riscv: rvv-1.0: add vector unit-stride mask load/store insns
` [PATCH v10 75/77] target/riscv: rvv-1.0: rename vmandnot.mm and vmornot.mm to vmandn.mm and vmorn.mm
` [PATCH v10 76/77] target/riscv: rvv-1.0: update opivv_vadc_check() comment
` [PATCH v10 77/77] target/riscv: rvv-1.0: Add ELEN checks for widening and narrowing instructions
[PATCH 1/2] virito-balloon: process all in sgs for free_page_vq
2021-11-29 2:48 UTC (6+ messages)
` [PATCH 2/2] virtio-balloon: correct used length
[PATCH 0/3] Fix irq allocation of PCI host bridge on powernv
2021-11-28 21:51 UTC (5+ messages)
` [PATCH 1/3] ppc/pnv: Tune the POWER9 PCIe Host bridge model
[PATCH 00/10] vhost: stick to -errno error return convention
2021-11-28 21:47 UTC (2+ messages)
[RFC PATCH 0/3] support subsets of virtual memory extension
2021-11-28 13:52 UTC (4+ messages)
` [RFC PATCH 1/3] target/riscv: add support for svnapot extension
` [RFC PATCH 2/3] target/riscv: add support for svinval extension
` [RFC PATCH 3/3] target/riscv: add support for svpbmt extension
[PATCH] tests/plugin/syscall.c: fix compiler warnings
2021-11-28 1:15 UTC
[PATCH v3 0/3] tpm: Add missing ACPI device identification objects
2021-11-27 23:12 UTC (3+ messages)
[PATCH for 7.0 0/5] bsd-user-smoke: A simple smoke test for bsd-user
2021-11-27 20:18 UTC (6+ messages)
` [PATCH for 7.0 1/5] h.armv7: Simple hello-world test for armv7
` [PATCH for 7.0 2/5] h.i386: Simple hello-world test for i386
` [PATCH for 7.0 3/5] h.amd64: Simple hello-world test for x86_64
` [PATCH for 7.0 4/5] smoke-bsd-user: A test script to run all the FreeBSD binaries
` [PATCH for 7.0 5/5] bsd-user-smoke: Add to build
[PATCH v6 0/4] virtio-iommu: config related fixes and qtest
2021-11-27 7:50 UTC (6+ messages)
` [PATCH v6 1/4] virtio-iommu: Remove set_config callback
` [PATCH v6 2/4] virtio-iommu: Fix endianness in get_config
` [PATCH v6 3/4] virtio-iommu: Fix the domain_range end
` [PATCH v6 4/4] tests: qtest: Add virtio-iommu test
[PATCH 1/1] ppc/pnv.c: add a friendly warning when accel=kvm is used
2021-11-27 5:14 UTC (4+ messages)
[RFC PATCH] blog post: how to get your new feature up-streamed
2021-11-26 20:33 UTC
[PATCH-for-6.2] docs: add a word of caution on x-native-hotplug property for pcie-root-ports
2021-11-26 19:38 UTC (4+ messages)
[PATCH v2 1/1] MAINTAINERS: update email address of Christian Borntraeger
2021-11-26 17:11 UTC (2+ messages)
[PATCH] hw/intc: cannot clear GICv3 ITS CTLR[Enabled] bit
2021-11-26 16:54 UTC (3+ messages)
[PATCH] hw/arm/virt: Extend nested and mte checks to hvf
2021-11-26 16:52 UTC (4+ messages)
[PATCH v6 0/3] support dirty restraint on vCPU
2021-11-26 16:24 UTC (4+ messages)
` [PATCH v6 3/3] cpus-common: implement dirty page limit "
[PATCH] hid: Implement support for side and extra buttons
2021-11-26 14:04 UTC
[RFC PATCH 0/2] QEMU/openbios: PPC Software TLB support in the G4 family
2021-11-26 15:02 UTC (17+ messages)
` [OpenBIOS] "
[PATCH v3] dbus-vmstate: Restrict error checks to registered proxies in dbus_get_proxies
2021-11-26 14:15 UTC
[Bug 1952448] Re: qemu 1:6.0+dfsg-2expubuntu2: Fail to build against OpenSSL 3.0
2021-11-26 13:58 UTC
[PATCH v2] dbus-vmstate: Restrict error checks to registered proxies in dbus_get_proxies
2021-11-26 13:48 UTC (2+ messages)
Follow-up on the CXL discussion at OFTC
2021-11-26 12:08 UTC (7+ messages)
[PATCH v2] hw/intc/arm_gicv3: Update cached state after LPI state changes
2021-11-25 15:37 UTC (2+ messages)
[PATCH v3 00/18] ppc/pnv: Extend the powernv10 machine
2021-11-26 11:53 UTC (4+ messages)
` [PATCH v3 12/18] ppc/pnv: Add support for PHB5 "Address-based trigger" mode
` [PATCH v3 14/18] ppc/pnv: add XIVE Gen2 TIMA support
` [PATCH v3 17/18] pnv/xive2: Add support for automatic save&restore
[PATCH v2] target/ppc: fix Hash64 MMU update of PTE bit R
2021-11-26 12:08 UTC (4+ messages)
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