messages from 2022-01-07 21:43:12 to 2022-01-08 09:21:06 UTC [more...]
[RFC PATCH v4 00/30] Add LoongArch softmmu support
2022-01-08 9:14 UTC (8+ messages)
` [RFC PATCH v4 01/30] target/loongarch: Update README
` [RFC PATCH v4 02/30] target/loongarch: Add CSR registers definition
` [RFC PATCH v4 03/30] target/loongarch: Add basic vmstate description of CPU
` [RFC PATCH v4 07/30] target/loongarch: Add LoongArch CSR instruction
` [RFC PATCH v4 09/30] target/loongarch: Add TLB instruction support
` [RFC PATCH v4 17/30] hw/loongarch: Add LoongArch ipi interrupt support(IPI)
` [RFC PATCH v4 27/30] hw/loongarch: Add LoongArch smbios support
[PULL 00/37] Bsd user arm patches
2022-01-08 7:37 UTC (38+ messages)
` [PULL 01/37] bsd-user/mips*: Remove mips support
` [PULL 02/37] bsd-user/freebsd: Create common target_os_ucontext.h file
` [PULL 03/37] bsd-user: create a per-arch signal.c file
` [PULL 04/37] bsd-user/i386/target_arch_signal.h: Remove target_sigcontext
` [PULL 05/37] bsd-user/i386/target_arch_signal.h: use new target_os_ucontext.h
` [PULL 06/37] bsd-user/i386/target_arch_signal.h: Update mcontext_t to match FreeBSD
` [PULL 07/37] bsd-user/i386: Move the inlines into signal.c
` [PULL 08/37] bsd-user/x86_64/target_arch_signal.h: Remove target_sigcontext
` [PULL 09/37] bsd-user/x86_64/target_arch_signal.h: use new target_os_ucontext.h
` [PULL 10/37] bsd-user/x86_64/target_arch_signal.h: Fill in mcontext_t
` [PULL 11/37] bsd-user/x86_64: Move functions into signal.c
` [PULL 12/37] bsd-user/target_os_signal.h: Move signal prototypes to target_os_ucontext.h
` [PULL 13/37] bsd-user/arm/target_arch_sysarch.h: Use consistent include guards
` [PULL 14/37] bsd-user/arm/target_syscall.h: Add copyright and update name
` [PULL 15/37] bsd-user/arm/target_arch_cpu.c: Target specific TLS routines
` [PULL 16/37] bsd-user/arm/target_arch_cpu.h: CPU Loop definitions
` [PULL 17/37] bsd-user/arm/target_arch_cpu.h: Implement target_cpu_clone_regs
` [PULL 18/37] bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementation
` [PULL 19/37] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions
` [PULL 20/37] bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions
` [PULL 21/37] bsd-user/arm/target_arch_cpu.h: Implement system call dispatch
` [PULL 22/37] bsd-user/arm/target_arch_reg.h: Implement core dump register copying
` [PULL 23/37] bsd-user/arm/target_arch_vmparam.h: Parameters for arm address space
` [PULL 24/37] bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for arm
` [PULL 25/37] bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread
` [PULL 26/37] bsd-user/arm/target_arch_elf.h: arm defines for ELF
` [PULL 27/37] bsd-user/arm/target_arch_elf.h: arm get hwcap
` [PULL 28/37] bsd-user/arm/target_arch_elf.h: arm get_hwcap2 impl
` [PULL 29/37] bsd-user/arm/target_arch_signal.h: arm specific signal registers and stack
` [PULL 30/37] bsd-user/arm/target_arch_signal.h: arm machine context and trapframe for signals
` [PULL 31/37] bsd-user/arm/target_arch_signal.h: Define size of *context_t
` [PULL 32/37] bsd-user/arm/signal.c: arm set_sigtramp_args
` [PULL 33/37] bsd-user/arm/signal.c: arm get_mcontext
` [PULL 34/37] bsd-user/arm/signal.c: arm set_mcontext
` [PULL 35/37] bsd-user/arm/signal.c: arm get_ucontext_sigreturn
` [PULL 36/37] bsd-user/freebsd/target_os_ucontext.h: Require TARGET_*CONTEXT_SIZE
` [PULL 37/37] bsd-user: add arm target build
[PATCH v4 00/12] tcg/mips: Unaligned access and other cleanup
2022-01-08 6:36 UTC (13+ messages)
` [PATCH v4 01/12] tcg/mips: Support unaligned access for user-only
` [PATCH v4 02/12] tcg/mips: Support unaligned access for softmmu
` [PATCH v4 03/12] tcg/mips: Move TCG_AREG0 to S8
` [PATCH v4 04/12] tcg/mips: Move TCG_GUEST_BASE_REG to S7
` [PATCH v4 05/12] tcg/mips: Unify TCG_GUEST_BASE_REG tests
` [PATCH v4 06/12] tcg/mips: Create and use TCG_REG_TB
` [PATCH v4 07/12] tcg/mips: Split out tcg_out_movi_one
` [PATCH v4 08/12] tcg/mips: Split out tcg_out_movi_two
` [PATCH v4 09/12] tcg/mips: Use the constant pool for 64-bit constants
` [PATCH v4 10/12] tcg/mips: Aggressively use the constant pool for n64 calls
` [PATCH v4 11/12] tcg/mips: Try tb-relative addresses in tcg_out_movi
` [PATCH v4 12/12] tcg/mips: Try three insns with shift and add "
[PATCH v3 0/2] hw/arm/virt: Support for virtio-mem-pci
2022-01-08 7:21 UTC (4+ messages)
` [PATCH v3 2/2] "
[PATCH v4 0/7] tcg/arm: Unaligned access and other cleanup
2022-01-08 6:33 UTC (8+ messages)
` [PATCH v4 1/7] tcg/arm: Drop support for armv4 and armv5 hosts
` [PATCH v4 2/7] tcg/arm: Remove use_armv5t_instructions
` [PATCH v4 3/7] tcg/arm: Remove use_armv6_instructions
` [PATCH v4 4/7] tcg/arm: Check alignment for ldrd and strd
` [PATCH v4 5/7] tcg/arm: Support unaligned access for softmmu
` [PATCH v4 6/7] tcg/arm: Reserve a register for guest_base
` [PATCH v4 7/7] tcg/arm: Support raising sigbus for user-only
[PULL 00/37] riscv-to-apply queue
2022-01-08 5:50 UTC (38+ messages)
` [PULL 01/37] target/riscv/pmp: fix no pmp illegal intrs
` [PULL 02/37] hw/dma: sifive_pdma: support high 32-bit access of 64-bit register
` [PULL 03/37] hw/dma: sifive_pdma: permit 4/8-byte access size of PDMA registers
` [PULL 04/37] hw/intc: sifive_plic: Add a reset function
` [PULL 05/37] hw/intc: sifive_plic: Cleanup the write function
` [PULL 06/37] hw/intc: sifive_plic: Cleanup the read function
` [PULL 07/37] hw/intc: sifive_plic: Cleanup remaining functions
` [PULL 08/37] target/riscv: Mark the Hypervisor extension as non experimental
` [PULL 09/37] target/riscv: Enable the Hypervisor extension by default
` [PULL 10/37] hw/riscv: Use error_fatal for SoC realisation
` [PULL 11/37] hw/riscv: virt: Allow support for 32 cores
` [PULL 12/37] roms/opensbi: Upgrade from v0.9 to v1.0
` [PULL 13/37] target/riscv: rvv-1.0: Call the correct RVF/RVD check function for widening fp insns
` [PULL 14/37] target/riscv: rvv-1.0: Call the correct RVF/RVD check function for widening fp/int type-convert insns
` [PULL 15/37] target/riscv: rvv-1.0: Call the correct RVF/RVD check function for narrowing "
` [PULL 16/37] target/riscv: Fix position of 'experimental' comment
` [PULL 17/37] exec/memop: Adding signedness to quad definitions
` [PULL 18/37] exec/memop: Adding signed quad and octo defines
` [PULL 19/37] qemu/int128: addition of div/rem 128-bit operations
` [PULL 20/37] target/riscv: additional macros to check instruction support
` [PULL 21/37] target/riscv: separation of bitwise logic and arithmetic helpers
` [PULL 22/37] target/riscv: array for the 64 upper bits of 128-bit registers
` [PULL 23/37] target/riscv: setup everything for rv64 to support rv128 execution
` [PULL 24/37] target/riscv: moving some insns close to similar insns
` [PULL 25/37] target/riscv: accessors to registers upper part and 128-bit load/store
` [PULL 26/37] target/riscv: support for 128-bit bitwise instructions
` [PULL 27/37] target/riscv: support for 128-bit U-type instructions
` [PULL 28/37] target/riscv: support for 128-bit shift instructions
` [PULL 29/37] target/riscv: support for 128-bit arithmetic instructions
` [PULL 30/37] target/riscv: support for 128-bit M extension
` [PULL 31/37] target/riscv: adding high part of some csrs
` [PULL 32/37] target/riscv: helper functions to wrap calls to 128-bit csr insns
` [PULL 33/37] target/riscv: modification of the trans_csrxx for 128-bit support
` [PULL 34/37] target/riscv: actual functions to realize crs 128-bit insns
` [PULL 35/37] target/riscv: Set the opcode in DisasContext
` [PULL 36/37] target/riscv: Fixup setting GVA
` [PULL 37/37] target/riscv: Implement the stval/mtval illegal instruction
[PATCH v6 00/23] QEMU RISC-V AIA support
2022-01-08 6:35 UTC (3+ messages)
` [PATCH v6 18/23] hw/intc: Add RISC-V AIA APLIC device emulation
[PULL v3 00/55] virtio,pci,pc: features,fixes,cleanups
2022-01-08 5:32 UTC (57+ messages)
` [PULL v3 01/55] virtio-mem: Don't skip alignment checks when warning about block size
` [PULL v3 02/55] acpi: validate hotplug selector on access
` [PULL v3 03/55] virtio: introduce macro IRTIO_CONFIG_IRQ_IDX
` [PULL v3 04/55] virtio-pci: decouple notifier from interrupt process
` [PULL v3 05/55] virtio-pci: decouple the single vector from the "
` [PULL v3 06/55] vhost: introduce new VhostOps vhost_set_config_call
` [PULL v3 07/55] vhost-vdpa: add support for config interrupt
` [PULL v3 08/55] virtio: add support for configure interrupt
` [PULL v3 09/55] vhost: "
` [PULL v3 10/55] virtio-net: "
` [PULL v3 11/55] virtio-mmio: "
` [PULL v3 12/55] virtio-pci: "
` [PULL v3 13/55] trace-events,pci: unify trace events format
` [PULL v3 14/55] vhost-user-blk: reconnect on any error during realize
` [PULL v3 15/55] chardev/char-socket: tcp_chr_recv: don't clobber errno
` [PULL v3 16/55] chardev/char-socket: tcp_chr_sync_read: "
` [PULL v3 17/55] vhost-backend: avoid overflow on memslots_limit
` [PULL v3 18/55] vhost-backend: stick to -errno error return convention
` [PULL v3 19/55] vhost-vdpa: "
` [PULL v3 20/55] vhost-user: "
` [PULL v3 21/55] vhost: "
` [PULL v3 22/55] vhost-user-blk: propagate error return from generic vhost
` [PULL v3 23/55] pci: Export the pci_intx() function
` [PULL v3 24/55] pcie_aer: Don't trigger a LSI if none are defined
` [PULL v3 25/55] smbios: Rename SMBIOS_ENTRY_POINT_* enums
` [PULL v3 26/55] hw/smbios: Use qapi for SmbiosEntryPointType
` [PULL v3 27/55] hw/i386: expose a "smbios-entry-point-type" PC machine property
` [PULL v3 28/55] hw/vhost-user-blk: turn on VIRTIO_BLK_F_SIZE_MAX feature for virtio blk device
` [PULL v3 29/55] util/oslib-posix: Let touch_all_pages() return an error
` [PULL v3 30/55] util/oslib-posix: Support MADV_POPULATE_WRITE for os_mem_prealloc()
` [PULL v3 31/55] util/oslib-posix: Introduce and use MemsetContext for touch_all_pages()
` [PULL v3 32/55] util/oslib-posix: Don't create too many threads with small memory or little pages
` [PULL v3 33/55] util/oslib-posix: Avoid creating a single thread with MADV_POPULATE_WRITE
` [PULL v3 34/55] util/oslib-posix: Support concurrent os_mem_prealloc() invocation
` [PULL v3 35/55] util/oslib-posix: Forward SIGBUS to MCE handler under Linux
` [PULL v3 36/55] virtio-mem: Support "prealloc=on" option
` [PULL v3 37/55] virtio: signal after wrapping packed used_idx
` [PULL v3 38/55] MAINTAINERS: Add a separate entry for acpi/VIOT tables
` [PULL v3 39/55] linux-headers: sync VIRTIO_MEM_F_UNPLUGGED_INACCESSIBLE
` [PULL v3 40/55] virtio-mem: Support VIRTIO_MEM_F_UNPLUGGED_INACCESSIBLE
` [PULL v3 41/55] virtio-mem: Set "unplugged-inaccessible=auto" for the 7.0 machine on x86
` [PULL v3 42/55] intel-iommu: correctly check passthrough during translation
` [PULL v3 43/55] acpi: fix QEMU crash when started with SLIC table
` [PULL v3 44/55] tests: acpi: whitelist expected blobs before changing them
` [PULL v3 45/55] tests: acpi: add SLIC table test
` [PULL v3 46/55] tests: acpi: SLIC: update expected blobs
` [PULL v3 47/55] acpihp: simplify acpi_pcihp_disable_root_bus
` [PULL v3 48/55] hw/i386/pc: Add missing property descriptions
` [PULL v3 49/55] docs: reSTify virtio-balloon-stats documentation and move to docs/interop
` [PULL v3 50/55] hw/scsi/vhost-scsi: don't leak vqs on error
` [PULL v3 51/55] hw/scsi/vhost-scsi: don't double close vhostfd "
` [PULL v3 52/55] virtio/vhost-vsock: don't double close vhostfd, remove redundant cleanup
` [PULL v3 53/55] tests: acpi: prepare for updated TPM related tables
` [PULL v3 54/55] acpi: tpm: Add missing device identification objects
` [PULL v3 55/55] tests: acpi: Add updated TPM related tables
[PATCH] hw/sensor: Add SB-TSI Temperature Sensor Interface
2022-01-08 3:04 UTC
[PATCH v3 0/6] support subsets of Float-Point in Integer Registers extensions
2022-01-08 1:17 UTC (7+ messages)
` [PATCH v3 2/6] target/riscv: hardwire mstatus.FS to zero when enable zfinx
` [PATCH v3 4/6] target/riscv: add support for zdinx
[PULL v2 00/55] virtio,pci,pc: features,fixes,cleanups
2022-01-08 0:34 UTC (3+ messages)
[PATCH] softmmu/device_tree: Silence compiler warning with --enable-sanitizers
2022-01-08 0:22 UTC (2+ messages)
ui/cocoa.m compile error
2022-01-07 23:47 UTC (3+ messages)
[RFC PATCH 0/2] QEMU/openbios: PPC Software TLB support in the G4 family
2022-01-07 23:19 UTC (12+ messages)
` [OpenBIOS] "
[PATCH v2] q800: fix segfault with invalid MacROM
2022-01-07 23:08 UTC (2+ messages)
[PATCH v3 0/8] target/ppc: powerpc_excp improvements (2/n)
2022-01-07 22:26 UTC (9+ messages)
` [PATCH v3 1/8] target/ppc: powerpc_excp: Extract software TLB logging into a function
` [PATCH v3 2/8] target/ppc: powerpc_excp: Keep 60x/7x5 soft MMU logs active
` [PATCH v3 3/8] target/ppc: powerpc_excp: Group unimplemented exceptions
` [PATCH v3 4/8] target/ppc: Add HV support to ppc_interrupts_little_endian
` [PATCH v3 5/8] target/ppc: Add MSR_ILE "
` [PATCH v3 6/8] target/ppc: Use ppc_interrupts_little_endian in powerpc_excp
` [PATCH v3 7/8] target/ppc: Introduce a wrapper for powerpc_excp
` [PATCH v3 8/8] target/ppc: Set the correct endianness for powernv memory dumps
[PATCH] tests/qtest: add qtests for npcm7xx sdhci
2022-01-07 22:25 UTC
[PATCH v5 00/24] linux-user: Clean up siginfo_t handling
2022-01-07 21:32 UTC (17+ messages)
` [PATCH v5 05/24] linux-user/hppa: Use force_sig_fault
` [PATCH v5 10/24] linux-user/i386: Use force_sig, force_sig_fault
` [PATCH v5 11/24] linux-user/m68k: Use force_sig_fault
` [PATCH v5 12/24] linux-user/microblaze: "
` [PATCH v5 13/24] linux-user/microblaze: Fix SIGFPE si_codes
` [PATCH v5 14/24] linux-user/mips: Improve do_break
` [PATCH v5 15/24] linux-user/mips: Use force_sig_fault
` [PATCH v5 16/24] target/mips: Extract break code into env->error_code
` [PATCH v5 17/24] target/mips: Extract trap "
` [PATCH v5 18/24] linux-user/openrisc: Use force_sig_fault
` [PATCH v5 19/24] linux-user/ppc: "
` [PATCH v5 20/24] linux-user/riscv: "
` [PATCH v5 21/24] linux-user/s390x: "
` [PATCH v5 22/24] linux-user/sh4: "
` [PATCH v5 23/24] linux-user/sparc: "
` [PATCH v5 24/24] linux-user/xtensa: "
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