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 messages from 2023-05-04 17:50:27 to 2023-05-05 02:31:38 UTC [more...]

[PULL 00/45] loongarch-to-apply queue
 2023-05-05  2:28 UTC  (25+ messages)
` [PULL 01/45] target/loongarch: Add LSX data type VReg
` [PULL 03/45] target/loongarch: Add CHECK_SXE maccro for check LSX enable
` [PULL 04/45] target/loongarch: Implement vadd/vsub
` [PULL 05/45] target/loongarch: Implement vaddi/vsubi
` [PULL 06/45] target/loongarch: Implement vneg
` [PULL 07/45] target/loongarch: Implement vsadd/vssub
` [PULL 08/45] target/loongarch: Implement vhaddw/vhsubw
` [PULL 09/45] target/loongarch: Implement vaddw/vsubw
` [PULL 10/45] target/loongarch: Implement vavg/vavgr
` [PULL 11/45] target/loongarch: Implement vabsd
` [PULL 12/45] target/loongarch: Implement vadda
` [PULL 13/45] target/loongarch: Implement vmax/vmin
` [PULL 20/45] target/loongarch: Implement vmskltz/vmskgez/vmsknz
` [PULL 21/45] target/loongarch: Implement LSX logic instructions
` [PULL 23/45] target/loongarch: Implement vsllwil vextl
` [PULL 25/45] target/loongarch: Implement vsrln vsran
` [PULL 27/45] target/loongarch: Implement vssrln vssran
` [PULL 28/45] target/loongarch: Implement vssrlrn vssrarn
` [PULL 30/45] target/loongarch: Implement vpcnt
` [PULL 31/45] target/loongarch: Implement vbitclr vbitset vbitrev
` [PULL 37/45] target/loongarch: Implement vbitsel vset
` [PULL 38/45] target/loongarch: Implement vinsgr2vr vpickve2gr vreplgr2vr
` [PULL 40/45] target/loongarch: Implement vilvl vilvh vextrins vshuf
` [PULL 41/45] target/loongarch: Implement vld vst

[PATCH v3 0/3] target/riscv: implement query-cpu-definitions
 2023-05-05  1:59 UTC  (4+ messages)

[PULL 00/89] riscv-to-apply queue
 2023-05-05  1:08 UTC  (92+ messages)
` [PULL 01/89] target/riscv: Avoid env_archcpu() when reading RISCVCPUConfig
` [PULL 02/89] target/riscv: Fix priv version dependency for vector and zfh
` [PULL 03/89] target/riscv: Simplify getting RISCVCPU pointer from env
` [PULL 04/89] target/riscv: Simplify type conversion for CPURISCVState
` [PULL 05/89] target/riscv: Simplify arguments for riscv_csrrw_check
` [PULL 06/89] target/riscv: refactor Zicond support
` [PULL 07/89] target/riscv: redirect XVentanaCondOps to use the Zicond functions
` [PULL 08/89] target/riscv: fix invalid riscv, event-to-mhpmcounters entry
` [PULL 09/89] target/riscv: add cfg properties for Zc* extension
` [PULL 10/89] target/riscv: add support for Zca extension
` [PULL 11/89] target/riscv: add support for Zcf extension
` [PULL 12/89] target/riscv: add support for Zcd extension
` [PULL 13/89] target/riscv: add support for Zcb extension
` [PULL 14/89] target/riscv: add support for Zcmp extension
` [PULL 15/89] target/riscv: add support for Zcmt extension
` [PULL 16/89] target/riscv: expose properties for Zc* extension
` [PULL 17/89] disas/riscv.c: add disasm support for Zc*
` [PULL 18/89] target/riscv: Add support for Zce
` [PULL 19/89] target/riscv: Fix itrigger when icount is used
` [PULL 20/89] target/riscv: Remove redundant call to riscv_cpu_virt_enabled
` [PULL 21/89] target/riscv: Remove redundant check on RVH
` [PULL 22/89] target/riscv: Remove check on RVH for riscv_cpu_virt_enabled
` [PULL 23/89] target/riscv: Remove check on RVH for riscv_cpu_set_virt_enabled
` [PULL 24/89] target/riscv: Convert env->virt to a bool env->virt_enabled
` [PULL 25/89] target/riscv: Remove redundant parentheses
` [PULL 26/89] target/riscv: Fix addr type for get_physical_address
` [PULL 27/89] target/riscv: Set opcode to env->bins for illegal/virtual instruction fault
` [PULL 28/89] target/riscv: Remove riscv_cpu_virt_enabled()
` [PULL 29/89] target/riscv: Fix format for indentation
` [PULL 30/89] target/riscv: Fix format for comments
` [PULL 31/89] target/riscv: Fix lines with over 80 characters
` [PULL 32/89] hw/riscv: Add signature dump function for spike to run ACT tests
` [PULL 33/89] target/riscv: sync env->misa_ext* with cpu->cfg in realize()
` [PULL 34/89] target/riscv: remove MISA properties from isa_edata_arr[]
` [PULL 35/89] target/riscv/cpu.c: remove 'multi_letter' from isa_ext_data
` [PULL 36/89] target/riscv: introduce riscv_cpu_add_misa_properties()
` [PULL 37/89] target/riscv: remove cpu->cfg.ext_a
` [PULL 38/89] target/riscv: remove cpu->cfg.ext_c
` [PULL 39/89] target/riscv: remove cpu->cfg.ext_d
` [PULL 40/89] target/riscv: remove cpu->cfg.ext_f
` [PULL 41/89] target/riscv: remove cpu->cfg.ext_i
` [PULL 42/89] target/riscv: remove cpu->cfg.ext_e
` [PULL 43/89] target/riscv: remove cpu->cfg.ext_m
` [PULL 44/89] target/riscv: remove cpu->cfg.ext_s
` [PULL 45/89] target/riscv: remove cpu->cfg.ext_u
` [PULL 46/89] target/riscv: remove cpu->cfg.ext_h
` [PULL 47/89] target/riscv: remove cpu->cfg.ext_j
` [PULL 48/89] target/riscv: remove cpu->cfg.ext_v
` [PULL 49/89] target/riscv: remove riscv_cpu_sync_misa_cfg()
` [PULL 50/89] target/riscv: remove cfg.ext_g setup from rv64_thead_c906_cpu_init()
` [PULL 51/89] target/riscv: add RVG and remove cpu->cfg.ext_g
` [PULL 52/89] target/riscv/cpu.c: redesign register_cpu_props()
` [PULL 53/89] target/riscv: Fix the mstatus.MPP value after executing MRET
` [PULL 54/89] target/riscv: Use PRV_RESERVED instead of PRV_H
` [PULL 55/89] target/riscv: Legalize MPP value in write_mstatus
` [PULL 56/89] target/riscv: Use check for relationship between Zdinx/Zhinx{min} and Zfinx
` [PULL 57/89] target/riscv: fix H extension TVM trap
` [PULL 58/89] target/riscv: Extract virt enabled state from tb flags
` [PULL 59/89] target/riscv: Add a general status enum for extensions
` [PULL 60/89] target/riscv: Encode the FS and VS on a normal way for tb flags
` [PULL 61/89] target/riscv: Remove mstatus_hs_{fs, vs} from tb_flags
` [PULL 62/89] target/riscv: Add a tb flags field for vstart
` [PULL 63/89] target/riscv: Separate priv from mmu_idx
` [PULL 64/89] target/riscv: Reduce overhead of MSTATUS_SUM change
` [PULL 65/89] target/riscv: Use cpu_ld*_code_mmu for HLVX
` [PULL 66/89] target/riscv: Handle HLV, HSV via helpers
` [PULL 67/89] target/riscv: Rename MMU_HYP_ACCESS_BIT to MMU_2STAGE_BIT
` [PULL 68/89] target/riscv: Introduce mmuidx_sum
` [PULL 69/89] target/riscv: Introduce mmuidx_priv
` [PULL 70/89] target/riscv: Introduce mmuidx_2stage
` [PULL 71/89] target/riscv: Move hstatus.spvp check to check_access_hlsv
` [PULL 72/89] target/riscv: Set MMU_2STAGE_BIT in riscv_cpu_mmu_index
` [PULL 73/89] target/riscv: Check SUM in the correct register
` [PULL 74/89] target/riscv: Hoist second stage mode change to callers
` [PULL 75/89] target/riscv: Hoist pbmte and hade out of the level loop
` [PULL 76/89] target/riscv: Move leaf pte processing out of "
` [PULL 77/89] target/riscv: Suppress pte update with is_debug
` [PULL 78/89] target/riscv: Don't modify SUM "
` [PULL 79/89] target/riscv: Merge checks for reserved pte flags
` [PULL 80/89] target/riscv: Reorg access check in get_physical_address
` [PULL 81/89] target/riscv: Reorg sum "
` [PULL 82/89] hw/intc/riscv_aplic: Zero init APLIC internal state
` [PULL 83/89] target/riscv: add CPU QOM header
` [PULL 84/89] target/riscv: add query-cpy-definitions support
` [PULL 85/89] target/riscv: add TYPE_RISCV_DYNAMIC_CPU
` [PULL 86/89] target/riscv: Restore the predicate() NULL check behavior
` [PULL 87/89] target/riscv: Fix Guest Physical Address Translation
` [PULL 88/89] riscv: Make sure an exception is raised if a pte is malformed
` [PULL 89/89] target/riscv: add Ventana's Veyron V1 CPU

[PULL 00/16] Migration 20230505 patches
 2023-05-05  0:48 UTC  (17+ messages)
` [PULL 01/16] migration: Fix block_bitmap_mapping migration
` [PULL 02/16] migration/rdma: Don't pass the QIOChannelRDMA as an opaque
` [PULL 03/16] migration: Document all migration_stats
` [PULL 04/16] migration: Put zero_pages in alphabetical order
` [PULL 05/16] migration: Rename xbzrle_enabled xbzrle_started
` [PULL 06/16] migration: Make RAM_SAVE_FLAG_HOOK a normal case entry
` [PULL 07/16] migration/rdma: simplify ram_control_load_hook()
` [PULL 08/16] migration/rdma: We can calculate the rioc from the QEMUFile
` [PULL 09/16] migration/rdma: It makes no sense to recive that flag without RDMA
` [PULL 10/16] migration/rdma: Check for postcopy sooner
` [PULL 11/16] migration: max_postcopy_bandwidth is a size parameter
` [PULL 12/16] migration: qemu_file_total_transferred() function is monotonic
` [PULL 13/16] qemu-file: No need to check for shutdown in qemu_file_rate_limit
` [PULL 14/16] qemu-file: remove shutdown member
` [PULL 15/16] qemu-file: Make total_transferred an uint64_t
` [PULL 16/16] qemu-file: Make ram_control_save_page() use accessors for rate_limit

[PATCH risu] use time() as random seed and introduce --randseed option
 2023-05-05  0:22 UTC  (3+ messages)

[PATCH 0/9] QEMU file cleanups
 2023-05-04 23:59 UTC  (8+ messages)
` [PATCH 3/9] qemu-file: make qemu_file_[sg]et_rate_limit() use an uint64_t
` [PATCH 4/9] qemu-file: Make rate_limit_used "
` [PATCH 9/9] qemu-file: Account for rate_limit usage on qemu_fflush()

[PATCH 0/5] Migration RDMA cleanup
 2023-05-04 22:53 UTC  (4+ messages)
` [PATCH 4/5] migration/rdma: It makes no sense to recive that flag without RDMA

[PATCH] migration: Rename xbzrle_enabled xbzrle_started
 2023-05-04 22:49 UTC  (3+ messages)

[PATCH v4 00/10] COLO: improve build options
 2023-05-04 22:46 UTC  (5+ messages)
` [PATCH v4 10/10] migration: block incoming colo when capability is disabled

[PATCH v5 00/21] block: remove aio_disable_external() API
 2023-05-04 21:44 UTC  (23+ messages)
` [PATCH v5 01/21] block: Fix use after free in blockdev_mark_auto_del()
` [PATCH v5 02/21] block-backend: split blk_do_set_aio_context()
` [PATCH v5 03/21] hw/qdev: introduce qdev_is_realized() helper
` [PATCH v5 04/21] virtio-scsi: avoid race between unplug and transport event
` [PATCH v5 05/21] virtio-scsi: stop using aio_disable_external() during unplug
` [PATCH v5 06/21] util/vhost-user-server: rename refcount to in_flight counter
` [PATCH v5 07/21] block/export: wait for vhost-user-blk requests when draining
` [PATCH v5 08/21] block/export: stop using is_external in vhost-user-blk server
` [PATCH v5 09/21] hw/xen: do not use aio_set_fd_handler(is_external=true) in xen_xenstore
` [PATCH v5 10/21] block: add blk_in_drain() API
` [PATCH v5 11/21] block: drain from main loop thread in bdrv_co_yield_to_drain()
` [PATCH v5 12/21] xen-block: implement BlockDevOps->drained_begin()
` [PATCH v5 13/21] hw/xen: do not set is_external=true on evtchn fds
` [PATCH v5 14/21] block/export: rewrite vduse-blk drain code
` [PATCH v5 15/21] block/export: don't require AioContext lock around blk_exp_ref/unref()
` [PATCH v5 16/21] block/fuse: do not set is_external=true on FUSE fd
` [PATCH v5 17/21] virtio: make it possible to detach host notifier from any thread
` [PATCH v5 18/21] virtio-blk: implement BlockDevOps->drained_begin()
` [PATCH v5 19/21] virtio-scsi: "
` [PATCH v5 20/21] virtio: do not set is_external=true on host notifiers
` [PATCH v5 21/21] aio: remove aio_disable_external() API

[PATCH v4 00/20] block: remove aio_disable_external() API
 2023-05-04 21:34 UTC  (9+ messages)
` [PATCH v4 16/20] virtio: make it possible to detach host notifier from any thread
` [PATCH v4 17/20] virtio-blk: implement BlockDevOps->drained_begin()
` [PATCH v4 18/20] virtio-scsi: "
` [PATCH v4 20/20] aio: remove aio_disable_external() API

[PATCH] hw/ppc/Kconfig: NVDIMM is a hard requirement for the pseries machine
 2023-05-04 21:19 UTC  (2+ messages)

[PATCH 0/4] vhost-user-fs: Internal migration
 2023-05-04 21:14 UTC  (3+ messages)

[PATCH v2] Add information how to fix common build error on Windows in symlink-install-tree
 2023-05-04 21:11 UTC 

[PATCH v4 0/7] Add EPYC-Genoa model and update previous EPYC Models
 2023-05-04 20:53 UTC  (8+ messages)
` [PATCH v4 1/7] target/i386: allow versioned CPUs to specify new cache_info
` [PATCH v4 2/7] target/i386: Add new EPYC CPU versions with updated cache_info
` [PATCH v4 3/7] target/i386: Add a couple of feature bits in 8000_0008_EBX
` [PATCH v4 4/7] target/i386: Add feature bits for CPUID_Fn80000021_EAX
` [PATCH v4 5/7] target/i386: Add missing feature bits in EPYC-Milan model
` [PATCH v4 6/7] target/i386: Add VNMI and automatic IBRS feature bits
` [PATCH v4 7/7] target/i386: Add EPYC-Genoa model to support Zen 4 processor series

[PATCH] vfio/pci: Static Resizable BAR capability
 2023-05-04 20:42 UTC 

[PATCH v3 0/7] Add EPYC-Genoa model and update previous EPYC Models
 2023-05-04 20:00 UTC  (5+ messages)
` [PATCH v3 1/7] target/i386: allow versioned CPUs to specify new cache_info

[PATCH v3 0/5] virtio-gpu cleanups and obvious definitions
 2023-05-04 19:12 UTC  (6+ messages)
` [PATCH v3 1/5] hw/display/virtio-gpu-virgl: virtio_gpu_gl -> virtio_gpu_virgl
` [PATCH v3 2/5] hw/display/virtio-gpu-virgl: make GL device more library agnostic
` [PATCH v3 3/5] hw/display/virtio-gpu-virgl: define callbacks in realize function
` [PATCH v3 4/5] virtio: Add shared memory capability
` [PATCH v3 5/5] virtio-gpu: CONTEXT_INIT feature

ssl fips self check fails with 7.2.0 on x86 TCG
 2023-05-04 19:03 UTC 

[PATCH] Hexagon (decode): look for pkts with multiple insns at the same slot
 2023-05-04 18:56 UTC 

[PATCH 0/2] Hexagon: improve output for arch version debugging
 2023-05-04 18:53 UTC  (3+ messages)
` [PATCH 1/2] Hexagon: list available CPUs with `-cpu help`
` [PATCH 2/2] Hexagon: append eflags to unknown cpu model string

[PATCH v2 0/6] misc tweaks for kvm and the 64bit pci window
 2023-05-04 18:22 UTC  (3+ messages)
` [PATCH v2 2/6] detect physical address space size

[PATCH v2 00/12] simpletrace: refactor and general improvements
 2023-05-04 18:03 UTC  (5+ messages)
` [PATCH v2 01/12] simpletrace: Improve parsing of sys.argv; fix files never closed

[PATCH v4 00/57] tcg: Improve atomicity support
 2023-05-04 15:02 UTC  (3+ messages)
` [PATCH v4 03/57] accel/tcg: Introduce tlb_read_idx


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