messages from 2025-02-06 14:03:40 to 2025-02-06 20:16:20 UTC [more...]
[PATCH 00/61] target/arm: Implement FEAT_SME2
2025-02-06 19:57 UTC (54+ messages)
` [PATCH 02/61] tcg: Add dbase argument to do_dup
` [PATCH 03/61] tcg: Add dbase argument to expand_clr
` [PATCH 04/61] tcg: Add base arguments to check_overlap_[234]
` [PATCH 05/61] tcg: Split out tcg_gen_gvec_2_var
` [PATCH 06/61] tcg: Split out tcg_gen_gvec_3_var
` [PATCH 07/61] tcg: Split out tcg_gen_gvec_mov_var
` [PATCH 08/61] tcg: Split out tcg_gen_gvec_{add,sub}_var
` [PATCH 09/61] target/arm: Introduce FPST_ZA, FPST_ZA_F16
` [PATCH 10/61] target/arm: Use FPST_ZA for sme_fmopa_[hsd]
` [PATCH 11/61] target/arm: Rename zarray to za_state.za
` [PATCH 12/61] target/arm: Add isar_feature_aa64_sme2*
` [PATCH 14/61] target/arm: Add zt0_excp_el to DisasContext
` [PATCH 15/61] target/arm: Implement SME2 ZERO ZT0
` [PATCH 16/61] target/arm: Implement SME2 LDR/STR ZT0
` [PATCH 17/61] target/arm: Implement SME2 MOVT
` [PATCH 18/61] target/arm: Split get_tile_rowcol argument tile_index
` [PATCH 19/61] target/arm: Rename MOVA for translate
` [PATCH 20/61] target/arm: Implement SME2 MOVA to/from tile, multiple registers
` [PATCH 21/61] target/arm: Split out get_zarray
` [PATCH 22/61] target/arm: Implement SME2 MOVA to/from array, multiple registers
` [PATCH 24/61] target/arm: Implement SME2 SMOPS, UMOPS (2-way)
` [PATCH 25/61] target/arm: Introduce gen_gvec_sve2_sqdmulh
` [PATCH 26/61] target/arm: Implement SME2 Multiple and Single SVE Destructive
` [PATCH 27/61] target/arm: Implement SME2 Multiple Vectors "
` [PATCH 28/61] target/arm: Implement SME2 ADD/SUB (array results, multiple and single vector)
` [PATCH 29/61] target/arm: Implement SME2 ADD/SUB (array results, multiple vectors)
` [PATCH 30/61] target/arm: Pass ZA to helper_sve2_fmlal_zz[zx]w_s
` [PATCH 31/61] target/arm: Implement SME2 FMLAL, BFMLAL
` [PATCH 32/61] target/arm: Implement SME2 FDOT
` [PATCH 33/61] target/arm: Implement SME2 BFDOT
` [PATCH 34/61] target/arm: Implement SME2 FVDOT, BFVDOT
` [PATCH 35/61] target/arm: Rename helper_gvec_*dot_[bh] to *_4[bh]
` [PATCH 36/61] target/arm: Remove helper_gvec_sudot_idx_4b
` [PATCH 38/61] target/arm: Implement SME2 SVDOT, UVDOT, SUVDOT, USVDOT
` [PATCH 39/61] target/arm: Implement SME2 SMLAL, SMLSL, UMLAL, UMLSL
` [PATCH 40/61] target/arm: Implement SME2 SMLALL, SMLSLL, UMLALL, UMLSLL
` [PATCH 41/61] target/arm: Rename gvec_fml[as]_[hs] with _nf_ infix
` [PATCH 42/61] target/arm: Implement SME2 FMLA, FMLS
` [PATCH 43/61] target/arm: Implement SME2 BFMLA, BFMLS
` [PATCH 44/61] target/arm: Implement SME2 FADD, FSUB, BFADD, BFSUB
` [PATCH 47/61] target/arm: Implement SME2 FCVT (widening), FCVTL
` [PATCH 48/61] target/arm: Implement SME2 FCVTZS, FCVTZU
` [PATCH 49/61] target/arm: Implement SME2 SCVTF, UCVTF
` [PATCH 50/61] target/arm: Implement SME2 FRINTN, FRINTP, FRINTM, FRINTA
` [PATCH 51/61] target/arm: Introduce do_[us]sat_[bhs] macros
` [PATCH 52/61] target/arm: Use do_[us]sat_[bhs] in sve_helper.c
` [PATCH 53/61] target/arm: Implement SME2 SQCVT, UQCVT, SQCVTU
` [PATCH 55/61] target/arm: Implement SME2 ZIP, UZP (four registers)
` [PATCH 56/61] target/arm: Move do_urshr, do_srshr to vec_internal.h
` [PATCH 57/61] target/arm: Implement SME2 SQRSHR, UQRSHR, SQRSHRN
` [PATCH 58/61] target/arm: Implement SME2 ZIP, UZP (two registers)
` [PATCH 59/61] target/arm: Implement SME2 FCLAMP, SCLAMP, UCLAMP
` [PATCH 61/61] target/arm: Enable FEAT_SME2, FEAT_SME_F16F16, FEAT_SVE_B16B16 on -cpu max
[PATCH 2/7] guest_memfd: Introduce an object to manage the guest-memfd with RamDiscardManager
2025-02-06 20:03 UTC (11+ messages)
[PATCH v1 0/1] xen: Remove invalidation of mapcache_grants on IOREQ_TYPE_INVALIDATE
2025-02-06 19:49 UTC (2+ messages)
` [PATCH v1 1/1] xen: No need to flush the mapcache for grants
[PATCH v5 0/6] target/i386: Update EPYC CPU models for Cache property, RAS, SVM feature and add EPYC-Turin CPU model
2025-02-06 19:28 UTC (7+ messages)
` [PATCH v5 1/6] target/i386: Update EPYC CPU model for Cache property, RAS, SVM feature bits
` [PATCH v5 2/6] target/i386: Update EPYC-Rome "
` [PATCH v5 3/6] target/i386: Update EPYC-Milan "
` [PATCH v5 4/6] target/i386: Add feature that indicates WRMSR to BASE reg is non-serializing
` [PATCH v5 5/6] target/i386: Update EPYC-Genoa for Cache property, perfmon-v2, RAS and SVM feature bits
` [PATCH v5 6/6] target/i386: Add support for EPYC-Turin model
[PULL 0/7] 9p queue 2025-02-06
2025-02-06 19:31 UTC (10+ messages)
` [PULL 7/7] MAINTAINERS: Mark me as reviewer only for 9pfs
` [PULL 1/7] 9pfs: improve v9fs_walk() tracing
` [PULL 6/7] tests/9p: extend use_dir_after_unlink test with Treaddir
` [PULL 5/7] tests/9p: add use_dir_after_unlink test
` [PULL 4/7] tests/9p: rename test use_after_unlink -> use_file_after_unlink
` [PULL 3/7] 9pfs: improve v9fs_open() tracing
` [PULL 2/7] 9pfs: make multidevs=remap default
[RFC PATCH 0/5] hw/arm/virt: Add support for user-creatable nested SMMUv3
2025-02-06 18:58 UTC (11+ messages)
[PATCH v5 00/16] hw/microblaze: Allow running cross-endian vCPUs
2025-02-06 18:43 UTC (20+ messages)
` [PATCH v5 02/16] hw/net/xilinx_ethlite: Make device endianness configurable
` [PATCH v5 11/16] hw/microblaze: Support various endianness for s3adsp1800 machines
` [PATCH v5 14/16] tests/functional: Remove sleep() kludges from microblaze tests
[PATCH 00/22] target/riscv: declarative CPU definitions
2025-02-06 18:27 UTC (23+ messages)
` [PATCH 01/22] target/riscv: remove unused macro DEFINE_CPU
` [PATCH 02/22] target/riscv: introduce RISCVCPUDef
` [PATCH 03/22] target/riscv: store RISCVCPUDef struct directly in the class
` [PATCH 04/22] target/riscv: merge riscv_cpu_class_init with the class_base function
` [PATCH 05/22] target/riscv: move RISCVCPUConfig fields to a header file
` [PATCH 06/22] target/riscv: add more RISCVCPUDef fields
` [PATCH 07/22] target/riscv: convert abstract CPU classes to RISCVCPUDef
` [PATCH 08/22] target/riscv: convert profile CPU models "
` [PATCH 09/22] target/riscv: convert bare "
` [PATCH 10/22] target/riscv: move 128-bit check to TCG realize
` [PATCH 11/22] target/riscv: convert dynamic CPU models to RISCVCPUDef
` [PATCH 12/22] target/riscv: convert SiFive E "
` [PATCH 13/22] target/riscv: convert ibex "
` [PATCH 14/22] target/riscv: convert SiFive U "
` [PATCH 15/22] target/riscv: th: make CSR insertion test a bit more intuitive
` [PATCH 16/22] target/riscv: generalize custom CSR functionality
` [PATCH 17/22] target/riscv: convert TT C906 to RISCVCPUDef
` [PATCH 18/22] target/riscv: convert TT Ascalon "
` [PATCH 19/22] target/riscv: convert Ventana V1 "
` [PATCH 20/22] target/riscv: convert Xiangshan Nanhu "
` [PATCH 21/22] target/riscv: remove .instance_post_init
` [PATCH 22/22] target/riscv: move SATP modes out of CPUConfig
[RFC PATCH 0/5] hw/arm/virt: Add support for user-creatable nested SMMUv3
2025-02-06 18:22 UTC (29+ messages)
[PATCH 0/7] hw/riscv: Move few units to common_ss[]
2025-02-06 18:19 UTC (9+ messages)
` [PATCH 1/7] MAINTAINERS: Unify Alistair's professional email address
` [PATCH 2/7] target/riscv: Move target-agnostic definitions to 'cpu-qom.h'
` [PATCH 3/7] hw/riscv/opentitan: Include missing 'exec/address-spaces.h' header
` [PATCH 4/7] hw/riscv/boot: Use 'hwaddr' type for firmware addresses
` [PATCH 5/7] hw/riscv/iommu: Reduce needs for target-specific code
` [PATCH 6/7] hw/riscv/hart: Make 'riscv_hart.h' header target-agnostic
` [PATCH 7/7] hw/riscv: Move few objects to common_ss[] to build them once
[PATCH] target/tricore: Inline TARGET_LONG_BITS in decode_rr_logical_shift()
2025-02-06 18:20 UTC (3+ messages)
[RFC PATCH 0/4] crypto,io,migration: Add support to gnutls_bye()
2025-02-06 18:15 UTC (6+ messages)
` [RFC PATCH 1/4] crypto: Allow gracefully ending the TLS session
` [RFC PATCH 2/4] io: tls: Add qio_channel_tls_bye
` [RFC PATCH 3/4] migration/multifd: Terminate the TLS connection
` [RFC PATCH 4/4] migration: Check migration error after loadvm
[PATCH] block: Remove unused blk_op_is_blocked()
2025-02-06 18:11 UTC (3+ messages)
[PATCH v4 00/33] Multifd 🔀 device state transfer support with VFIO consumer
2025-02-06 17:55 UTC (21+ messages)
` [PATCH v4 08/33] migration/multifd: Allow premature EOF on TLS incoming channels
[PATCH v2 00/18] Add i.MX 8M Plus EVK machine
2025-02-06 17:32 UTC (21+ messages)
` [PATCH v2 07/18] hw/arm/fsl-imx8mp: Add USDHC storage controllers
` [PATCH v2 09/18] hw/arm/fsl-imx8mp: Add GPIO controllers
` [PATCH v2 10/18] hw/arm/fsl-imx8mp: Add I2C controllers
` [PATCH v2 11/18] hw/arm/fsl-imx8mp: Add SPI controllers
` [PATCH v2 12/18] hw/arm/fsl-imx8mp: Add watchdog support
` [PATCH v2 13/18] hw/arm/fsl-imx8mp: Implement gneral purpose timers
` [PATCH v2 14/18] hw/arm/fsl-imx8mp: Add Ethernet controller
` [PATCH v2 15/18] hw/arm/fsl-imx8mp: Add USB support
` [PATCH v2 17/18] hw/arm/fsl-imx8mp: Add on-chip RAM
` [PATCH v2 18/18] hw/rtc: Add Ricoh RS5C372 RTC emulation
[PATCH v2 0/9]vfio: Improve error reporting when MMIO region mapping fails
2025-02-06 17:05 UTC (8+ messages)
` [PATCH v2 8/9] vfio: Check compatibility of CPU and IOMMU address space width
[PATCH 00/18] maintainer updates for feb25 (qtest, gdbstub, plugins)
2025-02-06 15:53 UTC (7+ messages)
` [PATCH 04/18] tests/qtest: simplify qtest_process_inbuf
` [PATCH 06/18] tests/qtest: tighten up the checks on clock_step
` [PATCH 07/18] Revert "util/timer: avoid deadlock when shutting down"
[PATCH] target/arm/helper: Fix timer interrupt masking when HCR_EL2.E2H == 0
2025-02-06 15:41 UTC (8+ messages)
[PATCH 0/2] disas/riscv: Add missing Sdtrig CSRs
2025-02-06 15:34 UTC (3+ messages)
` [PATCH 1/2] disas/riscv: Fix minor whitespace issues
` [PATCH 2/2] disas/riscv: Add missing Sdtrig CSRs
[PATCH 0/4] vfio/igd: sync PCI IDs with i915
2025-02-06 15:21 UTC (3+ messages)
` [PATCH 2/4] scripts/update-linux-headers: include PCI ID header for Intel GPUs
[RFC v4 0/5] Add packed virtqueue to shadow virtqueue
2025-02-06 15:17 UTC (17+ messages)
[PATCH 0/6] hw: Centralize handling, improve error messages for -machine dumpdtb
2025-02-06 15:12 UTC (7+ messages)
` [PATCH 1/6] monitor/hmp-cmds.c: Clean up hmp_dumpdtb printf
` [PATCH 2/6] hw/openrisc: Support monitor dumpdtb command
` [PATCH 3/6] hw/mips/boston: Check for error return from boston_fdt_filter()
` [PATCH 4/6] hw/mips/boston: Support dumpdtb monitor commands
` [PATCH 5/6] hw: Centralize handling of -machine dumpdtb option
` [PATCH 6/6] hw/core/machine.c: Make -machine dumpdtb=file.dtb with no DTB an error
[PATCH v7 0/3] hw/acpi: Add vmclock device
2025-02-06 15:11 UTC (6+ messages)
` [PATCH v7 3/3] "
Call for GSoC internship project ideas
2025-02-06 15:10 UTC (4+ messages)
[PATCH 0/2] hw/char/sh_serial: QOM housekeeping
2025-02-06 15:07 UTC (5+ messages)
` [PATCH 1/2] hw/char/sh_serial: Delete fifo_timeout_timer in DeviceUnrealize
` [PATCH 2/2] hw/char/sh_serial: Convert to TypeInfo
[PATCH v3 0/7] vfio: Improve error reporting when MMIO region mapping fails
2025-02-06 15:07 UTC (3+ messages)
` [PATCH v3 7/7] vfio: Remove superfluous error report in vfio_listener_region_add()
[PATCH] hw/sd/sdhci: Set reset value of interrupt registers
2025-02-06 15:05 UTC (6+ messages)
[PATCH V1 00/26] Live update: vfio and iommufd
2025-02-06 14:43 UTC (7+ messages)
` [PATCH V1 12/26] vfio-pci: preserve MSI
` [PATCH V1 13/26] vfio-pci: preserve INTx
[RFC v2 0/5] accel/kvm: Support KVM PMU filter
2025-02-06 14:54 UTC (13+ messages)
` [RFC v2 1/5] qapi/qom: Introduce kvm-pmu-filter object
` [RFC v2 3/5] i386/kvm: Support event with select & umask format in KVM PMU filter
[PATCH 0/5] Fix vIOMMU reset order
2025-02-06 14:21 UTC (6+ messages)
` [PATCH 1/5] hw/virtio/virtio-iommu: Migrate to 3-phase reset
` [PATCH 2/5] hw/i386/intel-iommu: "
` [PATCH 3/5] hw/i386/intel_iommu: Tear down address spaces before IOMMU reset
` [PATCH 4/5] hw/arm/smmuv3: Move reset to exit phase
` [PATCH 5/5] hw/vfio/common: Add a trace point in vfio_reset_handler
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).