messages from 2025-02-16 02:47:56 to 2025-02-16 23:40:37 UTC [more...]
[PATCH v3 000/162] tcg: Convert to TCGOutOp structures
2025-02-16 23:10 UTC (161+ messages)
` [PATCH v3 001/162] tcg: Add all_outop[]
` [PATCH v3 002/162] tcg: Remove INDEX_op_ext{8,16,32}*
` [PATCH v3 003/162] tcg: Merge INDEX_op_mov_{i32,i64}
` [PATCH v3 004/162] tcg: Convert add to TCGOutOpBinary
` [PATCH v3 005/162] tcg: Merge INDEX_op_add_{i32,i64}
` [PATCH v3 006/162] tcg: Convert and to TCGOutOpBinary
` [PATCH v3 007/162] tcg: Merge INDEX_op_and_{i32,i64}
` [PATCH v3 008/162] tcg/optimize: Fold andc with immediate to and
` [PATCH v3 009/162] tcg/optimize: Emit add r, r, -1 in fold_setcond_tst_pow2
` [PATCH v3 010/162] tcg: Convert andc to TCGOutOpBinary
` [PATCH v3 011/162] tcg: Merge INDEX_op_andc_{i32,i64}
` [PATCH v3 012/162] tcg: Convert or to TCGOutOpBinary
` [PATCH v3 013/162] tcg: Merge INDEX_op_or_{i32,i64}
` [PATCH v3 014/162] tcg/optimize: Fold orc with immediate to or
` [PATCH v3 015/162] tcg: Convert orc to TCGOutOpBinary
` [PATCH v3 016/162] tcg: Merge INDEX_op_orc_{i32,i64}
` [PATCH v3 017/162] tcg: Convert xor to TCGOutOpBinary
` [PATCH v3 018/162] tcg: Merge INDEX_op_xor_{i32,i64}
` [PATCH v3 019/162] tcg/optimize: Fold eqv with immediate to xor
` [PATCH v3 020/162] tcg: Convert eqv to TCGOutOpBinary
` [PATCH v3 021/162] tcg: Merge INDEX_op_eqv_{i32,i64}
` [PATCH v3 022/162] tcg: Convert nand to TCGOutOpBinary
` [PATCH v3 023/162] tcg: Merge INDEX_op_nand_{i32,i64}
` [PATCH v3 024/162] tcg/loongarch64: Do not accept constant argument to nor
` [PATCH v3 025/162] tcg: Convert nor to TCGOutOpBinary
` [PATCH v3 026/162] tcg: Merge INDEX_op_nor_{i32,i64}
` [PATCH v3 027/162] tcg/arm: Fix constraints for sub
` [PATCH v3 028/162] tcg: Convert sub to TCGOutOpSubtract
` [PATCH v3 029/162] tcg: Merge INDEX_op_sub_{i32,i64}
` [PATCH v3 030/162] tcg: Convert neg to TCGOutOpUnary
` [PATCH v3 031/162] tcg: Merge INDEX_op_neg_{i32,i64}
` [PATCH v3 032/162] tcg: Convert not to TCGOutOpUnary
` [PATCH v3 033/162] tcg: Merge INDEX_op_not_{i32,i64}
` [PATCH v3 034/162] tcg: Convert mul to TCGOutOpBinary
` [PATCH v3 035/162] tcg: Merge INDEX_op_mul_{i32,i64}
` [PATCH v3 036/162] tcg: Convert muluh to TCGOutOpBinary
` [PATCH v3 037/162] tcg: Merge INDEX_op_muluh_{i32,i64}
` [PATCH v3 038/162] tcg: Convert mulsh to TCGOutOpBinary
` [PATCH v3 039/162] tcg: Merge INDEX_op_mulsh_{i32,i64}
` [PATCH v3 040/162] tcg: Convert div to TCGOutOpBinary
` [PATCH v3 041/162] tcg: Merge INDEX_op_div_{i32,i64}
` [PATCH v3 042/162] tcg: Convert divu to TCGOutOpBinary
` [PATCH v3 043/162] tcg: Merge INDEX_op_divu_{i32,i64}
` [PATCH v3 044/162] tcg: Convert div2 to TCGOutOpDivRem
` [PATCH v3 045/162] tcg: Merge INDEX_op_div2_{i32,i64}
` [PATCH v3 046/162] tcg: Convert divu2 to TCGOutOpDivRem
` [PATCH v3 047/162] tcg: Merge INDEX_op_divu2_{i32,i64}
` [PATCH v3 048/162] tcg: Convert rem to TCGOutOpBinary
` [PATCH v3 049/162] tcg: Merge INDEX_op_rem_{i32,i64}
` [PATCH v3 050/162] tcg: Convert remu to TCGOutOpBinary
` [PATCH v3 051/162] tcg: Merge INDEX_op_remu_{i32,i64}
` [PATCH v3 052/162] tcg: Convert shl to TCGOutOpBinary
` [PATCH v3 053/162] tcg: Merge INDEX_op_shl_{i32,i64}
` [PATCH v3 054/162] tcg: Convert shr to TCGOutOpBinary
` [PATCH v3 055/162] tcg: Merge INDEX_op_shr_{i32,i64}
` [PATCH v3 056/162] tcg: Convert sar to TCGOutOpBinary
` [PATCH v3 057/162] tcg: Merge INDEX_op_sar_{i32,i64}
` [PATCH v3 058/162] tcg: Do not require both rotr and rotl from the backend
` [PATCH v3 059/162] tcg: Convert rotl, rotr to TCGOutOpBinary
` [PATCH v3 060/162] tcg: Merge INDEX_op_rot{l,r}_{i32,i64}
` [PATCH v3 061/162] tcg: Convert clz to TCGOutOpBinary
` [PATCH v3 062/162] tcg: Merge INDEX_op_clz_{i32,i64}
` [PATCH v3 063/162] tcg: Convert ctz to TCGOutOpBinary
` [PATCH v3 064/162] tcg: Merge INDEX_op_ctz_{i32,i64}
` [PATCH v3 065/162] tcg: Convert ctpop to TCGOutOpUnary
` [PATCH v3 066/162] tcg: Merge INDEX_op_ctpop_{i32,i64}
` [PATCH v3 067/162] tcg: Convert muls2 to TCGOutOpMul2
` [PATCH v3 068/162] tcg: Merge INDEX_op_muls2_{i32,i64}
` [PATCH v3 069/162] tcg: Convert mulu2 to TCGOutOpMul2
` [PATCH v3 070/162] tcg: Merge INDEX_op_mulu2_{i32,i64}
` [PATCH v3 071/162] tcg/loongarch64: Support negsetcond
` [PATCH v3 072/162] tcg/mips: "
` [PATCH v3 073/162] tcg/tci: "
` [PATCH v3 074/162] tcg: Remove TCG_TARGET_HAS_negsetcond_{i32,i64}
` [PATCH v3 075/162] tcg: Convert setcond, negsetcond to TCGOutOpSetcond
` [PATCH v3 076/162] tcg: Merge INDEX_op_{neg}setcond_{i32,i64}`
` [PATCH v3 077/162] tcg: Convert brcond to TCGOutOpBrcond
` [PATCH v3 078/162] tcg: Merge INDEX_op_brcond_{i32,i64}
` [PATCH v3 079/162] tcg: Convert movcond to TCGOutOpMovcond
` [PATCH v3 080/162] tcg: Merge INDEX_op_movcond_{i32,i64}
` [PATCH v3 081/162] tcg/ppc: Drop fallback constant loading in tcg_out_cmp
` [PATCH v3 082/162] tcg/arm: Expand arguments to tcg_out_cmp2
` [PATCH v3 083/162] tcg/ppc: "
` [PATCH v3 084/162] tcg: Convert brcond2_i32 to TCGOutOpBrcond2
` [PATCH v3 085/162] tcg: Convert setcond2_i32 to TCGOutOpSetcond2
` [PATCH v3 086/162] tcg: Convert bswap16 to TCGOutOpBswap
` [PATCH v3 087/162] tcg: Merge INDEX_op_bswap16_{i32,i64}
` [PATCH v3 088/162] tcg: Convert bswap32 to TCGOutOpBswap
` [PATCH v3 089/162] tcg: Merge INDEX_op_bswap32_{i32,i64}
` [PATCH v3 090/162] tcg: Convert bswap64 to TCGOutOpUnary
` [PATCH v3 091/162] tcg: Rename INDEX_op_bswap64_i64 to INDEX_op_bswap64
` [PATCH v3 092/162] tcg: Convert extract to TCGOutOpExtract
` [PATCH v3 093/162] tcg: Merge INDEX_op_extract_{i32,i64}
` [PATCH v3 094/162] tcg: Convert sextract to TCGOutOpExtract
` [PATCH v3 095/162] tcg: Merge INDEX_op_sextract_{i32,i64}
` [PATCH v3 096/162] tcg: Convert ext_i32_i64 to TCGOutOpUnary
` [PATCH v3 097/162] tcg: Convert extu_i32_i64 "
` [PATCH v3 098/162] tcg: Convert extrl_i64_i32 "
` [PATCH v3 099/162] tcg: Convert extrh_i64_i32 "
` [PATCH v3 100/162] tcg: Convert deposit to TCGOutOpDeposit
` [PATCH v3 101/162] tcg/aarch64: Improve deposit
` [PATCH v3 102/162] tcg: Merge INDEX_op_deposit_{i32,i64}
` [PATCH v3 103/162] tcg: Convert extract2 to TCGOutOpExtract2
` [PATCH v3 104/162] tcg: Merge INDEX_op_extract2_{i32,i64}
` [PATCH v3 105/162] tcg: Expand fallback add2 with 32-bit operations
` [PATCH v3 106/162] tcg: Expand fallback sub2 "
` [PATCH v3 107/162] tcg: Do not default add2/sub2_i32 for 32-bit hosts
` [PATCH v3 108/162] tcg/mips: Drop support for add2/sub2
` [PATCH v3 109/162] tcg/riscv: "
` [PATCH v3 110/162] tcg: Move i into each for loop in liveness_pass_1
` [PATCH v3 111/162] tcg: Sink def, nb_iargs, nb_oargs loads "
` [PATCH v3 112/162] tcg: Add add/sub with carry opcodes and infrastructure
` [PATCH v3 113/162] tcg: Add TCGOutOp structures for add/sub carry opcodes
` [PATCH v3 114/162] tcg/optimize: Handle add/sub with "
` [PATCH v3 115/162] tcg/optimize: With two const operands, prefer 0 in arg1
` [PATCH v3 116/162] tcg: Use add carry opcodes to expand add2
` [PATCH v3 117/162] tcg: Use sub carry opcodes to expand sub2
` [PATCH v3 118/162] tcg/i386: Honor carry_live in tcg_out_movi
` [PATCH v3 119/162] tcg/i386: Implement add/sub carry opcodes
` [PATCH v3 120/162] tcg/i386: Remove support for add2/sub2
` [PATCH v3 121/162] tcg/i386: Special case addci r, 0, 0
` [PATCH v3 122/162] tcg: Add tcg_gen_addcio_{i32,i64,tl}
` [PATCH v3 123/162] target/arm: Use tcg_gen_addcio_* for ADCS
` [PATCH v3 124/162] target/hppa: Use tcg_gen_addcio_i64
` [PATCH v3 125/162] target/microblaze: Use tcg_gen_addcio_i32
` [PATCH v3 126/162] target/openrisc: Use tcg_gen_addcio_* for ADDC
` [PATCH v3 127/162] target/ppc: Use tcg_gen_addcio_tl for ADD and SUBF
` [PATCH v3 128/162] target/s390x: Use tcg_gen_addcio_i64 for op_addc64
` [PATCH v3 129/162] target/sh4: Use tcg_gen_addcio_i32 for addc
` [PATCH v3 130/162] target/sparc: Use tcg_gen_addcio_tl for gen_op_addcc_int
` [PATCH v3 132/162] tcg/aarch64: Implement add/sub carry opcodes
` [PATCH v3 133/162] tcg/aarch64: Remove support for add2/sub2
` [PATCH v3 134/162] tcg/arm: Implement add/sub carry opcodes
` [PATCH v3 135/162] tcg/arm: Remove support for add2/sub2
` [PATCH v3 136/162] tcg/ppc: Implement add/sub carry opcodes
` [PATCH v3 137/162] tcg/ppc: Remove support for add2/sub2
` [PATCH v3 138/162] tcg/s390x: Honor carry_live in tcg_out_movi
` [PATCH v3 139/162] tcg/s390: Add TCG_CT_CONST_N32
` [PATCH v3 140/162] tcg/s390x: Implement add/sub carry opcodes
` [PATCH v3 141/162] tcg/s390x: Use ADD LOGICAL WITH SIGNED IMMEDIATE
` [PATCH v3 142/162] tcg/s390x: Remove support for add2/sub2
` [PATCH v3 143/162] tcg/sparc64: Hoist tcg_cond_to_bcond lookup out of tcg_out_movcc
` [PATCH v3 144/162] tcg/sparc64: Implement add/sub carry opcodes
` [PATCH v3 145/162] tcg/sparc64: Remove support for add2/sub2
` [PATCH v3 147/162] tcg/tci: "
` [PATCH v3 148/162] tcg: Remove add2/sub2 opcodes
` [PATCH v3 149/162] tcg: Formalize tcg_out_mb
` [PATCH v3 150/162] tcg: Formalize tcg_out_br
` [PATCH v3 151/162] tcg: Formalize tcg_out_goto_ptr
` [PATCH v3 152/162] tcg: Assign TCGOP_TYPE in liveness_pass_2
` [PATCH v3 153/162] tcg: Convert ld to TCGOutOpLoad
` [PATCH v3 154/162] tcg: Merge INDEX_op_ld*_{i32,i64}
` [PATCH v3 155/162] tcg: Convert st to TCGOutOpStore
` [PATCH v3 156/162] tcg: Merge INDEX_op_st*_{i32,i64}
` [PATCH v3 157/162] tcg: Stash MemOp size in TCGOP_FLAGS
` [PATCH v3 158/162] tcg: Remove INDEX_op_qemu_st8_*
` [PATCH v3 159/162] tcg: Merge INDEX_op_{ld,st}_{i32,i64,i128}
` [PATCH v3 160/162] tcg: Convert qemu_ld{2} to TCGOutOpLoad{2}
` [PATCH v3 161/162] tcg: Convert qemu_st{2} to TCGOutOpLdSt{2}
` [PATCH v3 162/162] tcg: Remove tcg_out_op
[PATCH V1 00/26] Live update: vfio and iommufd
2025-02-16 23:19 UTC (5+ messages)
` [PATCH V1 16/26] vfio: return mr from vfio_get_xlat_addr
[PATCH v9 0/3] TPM TIS SPI Support
2025-02-16 22:11 UTC (4+ messages)
` [PATCH v9 1/3] tpm/tpm_tis_spi: Support TPM for SPI (Serial Peripheral Interface)
` [PATCH v9 2/3] tpm/tpm_tis_spi: activation for the PowerNV machines
` [PATCH v9 3/3] tests/qtest/tpm: add unit test to tis-spi
[PATCH v2 00/28] x86: Improve operation under QEMU
2025-02-16 21:57 UTC (6+ messages)
` [PATCH v2 02/28] x86: qemu: Switch to bochs display
` [PATCH v2 03/28] x86: qemu: Enable dhrystone
` [PATCH v2 04/28] x86: qemu: Avoid accessing BSS too early
[PATCH 0/5] hw: More DEVICE_ [NATIVE -> LITTLE] _ENDIAN conversions
2025-02-16 21:03 UTC (2+ messages)
[PATCH v8 0/6] hw/microblaze: Allow running cross-endian vCPUs
2025-02-16 21:03 UTC (2+ messages)
[PULL 00/39] Misc HW patches for 2025-02-16
2025-02-16 21:01 UTC (12+ messages)
` [PULL 29/39] hw/qdev-properties-system: Introduce EndianMode QAPI enum
` [PULL 30/39] hw/intc/xilinx_intc: Make device endianness configurable
` [PULL 31/39] hw/net/xilinx_ethlite: "
` [PULL 32/39] hw/timer/xilinx_timer: "
` [PULL 33/39] hw/char/xilinx_uartlite: "
` [PULL 34/39] hw/ssi/xilinx_spi: "
` [PULL 35/39] hw/arm: Mark Allwinner Technology devices as little-endian
` [PULL 36/39] hw/mips: Mark Boston machine "
` [PULL 37/39] hw/mips: Mark Loonson3 Virt "
` [PULL 38/39] hw/pci-host: Mark versatile regions "
` [PULL 39/39] hw/rx: Allow execution without either bios or kernel
[PATCH 0/2] tcg: minor cleanups
2025-02-16 19:04 UTC (5+ messages)
` [PATCH 1/2] tcg/i386: Use tcg_{high, unsigned}_cond in tcg_out_brcond2
` [PATCH 2/2] tcg: Remove TCG_TARGET_HAS_{br, set}cond2 from riscv and loongarch64
[PATCH v20 00/11] hw/pci: SR-IOV related fixes and improvements
2025-02-16 18:39 UTC (5+ messages)
` [PATCH v20 06/11] pcie_sriov: Do not manually unrealize
[PATCH] tcg: refactor pool data for simplicity and comprehension
2025-02-16 18:01 UTC (4+ messages)
[PATCH 0/5] Improve Microchip Polarfire SoC customization
2025-02-16 14:06 UTC (3+ messages)
` [PATCH 5/5] hw/riscv: Configurable MPFS CLINT timebase freq
[PATCH 0/6] tcg: Introduce constraint for zero register
2025-02-16 13:06 UTC (3+ messages)
` [PATCH 2/6] tcg/aarch64: Use 'z' constraint
[PATCH v2 00/10] rust: Add HPET timer device
2025-02-16 11:47 UTC (4+ messages)
` [PATCH v2 01/10] i386/fw_cfg: move hpet_cfg definition to hpet.c
[PATCH v2] hpet: do not overwrite properties on post_load
2025-02-16 9:28 UTC
[PATCH] bcm2838: Add GIC-400 timer interupt connections
2025-02-16 3:54 UTC
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