messages from 2025-04-22 17:00:10 to 2025-04-22 20:56:47 UTC [more...]
[PATCH 000/147] single-binary patch queue
2025-04-22 20:56 UTC (158+ messages)
` [PATCH 001/147] exec/tswap: target code can use TARGET_BIG_ENDIAN instead of target_words_bigendian()
` [PATCH 002/147] exec/tswap: implement {ld, st}.*_p as functions instead of macros
` [PATCH 003/147] exec/memory_ldst: extract memory_ldst declarations from cpu-all.h
` [PATCH 004/147] exec/memory_ldst_phys: extract memory_ldst_phys "
` [PATCH 005/147] exec/memory.h: make devend_memop "target defines" agnostic
` [PATCH 006/147] codebase: prepare to remove cpu.h from exec/exec-all.h
` [PATCH 007/147] exec/exec-all: remove dependency on cpu.h
` [PATCH 008/147] exec/memory-internal: "
` [PATCH 009/147] exec/ram_addr: "
` [PATCH 010/147] system/kvm: make kvm_flush_coalesced_mmio_buffer() accessible for common code
` [PATCH 011/147] exec/ram_addr: call xen_hvm_modified_memory only if xen is enabled
` [PATCH 012/147] hw/xen: add stubs for various functions
` [PATCH 013/147] system/xen: remove inline stubs
` [PATCH 014/147] system/physmem: compilation unit is now common to all targets
` [PATCH 015/147] include/exec/memory: extract devend_big_endian from devend_memop
` [PATCH 016/147] include/exec/memory: move devend functions to memory-internal.h
` [PATCH 017/147] system/memory: make compilation unit common
` [PATCH 018/147] system/ioport: "
` [PATCH 019/147] accel/tcg: Build user-exec-stub.c once
` [PATCH 020/147] accel/tcg: Build plugin-gen.c once
` [PATCH 021/147] accel/tcg: Fix cpu_ld*_code_mmu for user mode
` [PATCH 022/147] include/exec: Use vaddr for *_mmu guest memory access routines
` [PATCH 023/147] include/exec: Split out cpu-ldst-common.h
` [PATCH 024/147] include/exec: Split out accel/tcg/cpu-mmu-index.h
` [PATCH 025/147] include/exec: Inline *_mmuidx_ra memory operations
` [PATCH 026/147] include/exec: Inline *_data_ra "
` [PATCH 027/147] include/exec: Inline *_data "
` [PATCH 028/147] include/exec: Inline *_code "
` [PATCH 029/147] accel/tcg: Perform aligned atomic reads in translator_ld
` [PATCH 030/147] accel/tcg: Use cpu_ld*_code_mmu in translator.c
` [PATCH 031/147] accel/tcg: Implement translator_ld*_end
` [PATCH 032/147] accel/tcg: Remove mmap_lock/unlock from watchpoint.c
` [PATCH 033/147] include/exec: Split out mmap-lock.h
` [PATCH 034/147] include/system: Move exec/memory.h to system/memory.h
` [PATCH 035/147] include/system: Move exec/address-spaces.h to system/address-spaces.h
` [PATCH 036/147] include/system: Move exec/ioport.h to system/ioport.h
` [PATCH 037/147] include/system: Move exec/ram_addr.h to system/ram_addr.h
` [PATCH 038/147] include/system: Move exec/ramblock.h to system/ramblock.h
` [PATCH 039/147] accel/tcg: Remove unnecesary inclusion of memory-internal.h in cputlb.c
` [PATCH 040/147] exec: Restrict memory-internal.h to system/
` [PATCH 041/147] meson: Introduce top-level libuser_ss and libsystem_ss
` [PATCH 042/147] gdbstub: Move syscalls.c out of common_ss
` [PATCH 043/147] accel/tcg: Use libuser_ss and libsystem_ss
` [PATCH 044/147] target/mips: Restrict semihosting tests to system mode
` [PATCH 045/147] target/xtensa: "
` [PATCH 046/147] semihosting: Move user-only implementation out-of-line
` [PATCH 047/147] semihosting: Assert is_user in user-only semihosting_enabled
` [PATCH 048/147] include/exec: Split out watchpoint.h
` [PATCH 049/147] hw/core: Move unconditional files to libsystem_ss, libuser_ss
` [PATCH 050/147] system: Move most files to libsystem_ss
` [PATCH 051/147] plugins: Move api.c, core.c to libuser_ss, libsystem_ss
` [PATCH 052/147] include/exec: Drop ifndef CONFIG_USER_ONLY from cpu-common.h
` [PATCH 053/147] include/hw/core: Drop ifndef CONFIG_USER_ONLY from cpu.h
` [PATCH 054/147] include/hw/intc: Remove ifndef CONFIG_USER_ONLY from armv7m_nvic.h
` [PATCH 055/147] include/hw/s390x: Remove ifndef CONFIG_USER_ONLY in css.h
` [PATCH 056/147] include/exec: Split out icount.h
` [PATCH 057/147] include/exec: Protect icount_enabled from poisoned symbols
` [PATCH 058/147] include/system: Remove ifndef CONFIG_USER_ONLY in qtest.h
` [PATCH 059/147] include/qemu: Remove ifndef CONFIG_USER_ONLY from accel.h
` [PATCH 060/147] target/riscv: Remove ifndef CONFIG_USER_ONLY from cpu_cfg.h
` [PATCH 061/147] meson: Only allow CONFIG_USER_ONLY from certain source sets
` [PATCH 062/147] exec/cpu-all: extract tlb flags defines to exec/tlb-flags.h
` [PATCH 063/147] accel/tcg: Fix argument types of tlb_reset_dirty
` [PATCH 064/147] accel/tcg: Pass CPUTLBEntryFull to tlb_reset_dirty_range_locked
` [PATCH 065/147] accel/tcg: Rebuild full flags in tlb_reset_dirty_range_locked
` [PATCH 066/147] include/exec: Move TLB_MMIO, TLB_DISCARD_WRITE to slow flags
` [PATCH 067/147] include/exec: Move tb_{, set_}page_addr[01] to translation-block.h
` [PATCH 068/147] accel/tcg: Move get_page_addr_code* declarations
` [PATCH 069/147] accel/tcg: Remove page_protect
` [PATCH 070/147] accel/tcg: Remove cpu-all.h, exec-all.h from tb-internal.h
` [PATCH 071/147] target/rx: Fix copy/paste typo (riscv -> rx)
` [PATCH 072/147] hw/core/cpu: Update CPUClass::mmu_index docstring
` [PATCH 073/147] accel/tcg: Introduce TCGCPUOps::mmu_index() callback
` [PATCH 074/147] target/alpha: Restrict SoftMMU mmu_index() to TCG
` [PATCH 075/147] target/arm: "
` [PATCH 076/147] target/avr: "
` [PATCH 077/147] target/hppa: "
` [PATCH 078/147] target/i386: Remove unused cpu_(ldub, stb)_kernel macros
` [PATCH 079/147] target/i386: Restrict cpu_mmu_index_kernel() to TCG
` [PATCH 080/147] target/i386: Restrict SoftMMU mmu_index() "
` [PATCH 081/147] target/loongarch: "
` [PATCH 082/147] target/m68k: "
` [PATCH 083/147] target/microblaze: "
` [PATCH 084/147] target/mips: "
` [PATCH 085/147] target/openrisc: "
` [PATCH 086/147] target/ppc: "
` [PATCH 087/147] target/riscv: "
` [PATCH 088/147] target/rx: "
` [PATCH 089/147] target/s390x: "
` [PATCH 090/147] target/sh4: "
` [PATCH 091/147] target/sparc: "
` [PATCH 092/147] target/tricore: "
` [PATCH 093/147] target/xtensa: "
` [PATCH 094/147] target/hexagon: Implement TCGCPUOps.mmu_index
` [PATCH 095/147] hw/core/cpu: Remove CPUClass::mmu_index()
` [PATCH 096/147] accel/tcg: Build translator.c twice
` [PATCH 097/147] accel/tcg: Split out tlb-bounds.h
` [PATCH 098/147] include/exec: Redefine tlb-flags with absolute values
` [PATCH 099/147] page-vary: Move and rename qemu_target_page_bits_min
` [PATCH 100/147] page-vary: Restrict scope of TARGET_PAGE_BITS_MIN
` [PATCH 101/147] exec/cpu-all: move cpu_copy to linux-user/qemu.h
` [PATCH 102/147] include/exec/cpu-all: move compile time check for CPUArchState to cpu-target.c
` [PATCH 103/147] exec/cpu-all: remove system/memory include
` [PATCH 104/147] exec/cpu-all: remove exec/page-protection include
` [PATCH 105/147] exec/cpu-all: remove tswap include
` [PATCH 106/147] exec/cpu-all: remove exec/cpu-interrupt include
` [PATCH 107/147] accel/tcg: fix missing includes for TCG_GUEST_DEFAULT_MO
` [PATCH 108/147] accel/tcg: fix missing includes for TARGET_HAS_PRECISE_SMC
` [PATCH 109/147] exec/cpu-all: remove cpu include
` [PATCH 110/147] exec/cpu-all: remove exec/target_page include
` [PATCH 111/147] exec/cpu-all: transfer exec/cpu-common include to cpu.h headers
` [PATCH 112/147] exec/cpu-all: remove this header
` [PATCH 113/147] accel/kvm: move KVM_HAVE_MCE_INJECTION define to kvm-all.c
` [PATCH 114/147] exec/poison: KVM_HAVE_MCE_INJECTION can now be poisoned
` [PATCH 115/147] target/arm/cpu: always define kvm related registers
` [PATCH 116/147] target/arm/cpu: flags2 is always uint64_t
` [PATCH 117/147] target/arm/cpu: define same set of registers for aarch32 and aarch64
` [PATCH 118/147] target/arm/cpu: remove inline stubs for aarch32 emulation
` [PATCH 119/147] meson: add common hw files
` [PATCH 120/147] hw/arm/boot: make compilation unit hw common
` [PATCH 121/147] hw/arm/digic_boards: prepare compilation unit to be common
` [PATCH 122/147] hw/arm/xlnx-zynqmp: "
` [PATCH 123/147] hw/arm/xlnx-versal: "
` [PATCH 124/147] hw/arm: make most of the compilation units common
` [PATCH 125/147] target/riscv: Do not expose rv128 CPU on user mode emulation
` [PATCH 126/147] tcg: Include missing 'cpu.h' in translate-all.c
` [PATCH 127/147] tcg: Declare TARGET_INSN_START_EXTRA_WORDS in 'cpu-param.h'
` [PATCH 128/147] tcg: Always define TARGET_INSN_START_EXTRA_WORDS
` [PATCH 129/147] exec: Restrict 'cpu-ldst-common.h' to accel/tcg/
` [PATCH 130/147] exec: Restrict 'cpu_ldst.h' "
` [PATCH 131/147] exec: Do not include 'accel/tcg/cpu-ldst.h' in 'exec-all.h'
` [PATCH 132/147] tcg: Always define TCG_GUEST_DEFAULT_MO
` [PATCH 133/147] tcg: Simplify tcg_req_mo() macro
` [PATCH 134/147] tcg: Define guest_default_memory_order in TCGCPUOps
` [PATCH 135/147] tcg: Remove use of TCG_GUEST_DEFAULT_MO in tb_gen_code()
` [PATCH 136/147] tcg: Propagate CPUState argument to cpu_req_mo()
` [PATCH 137/147] tcg: Have tcg_req_mo() use TCGCPUOps::guest_default_memory_order
` [PATCH 138/147] tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally
` [PATCH 139/147] tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h'
` [PATCH 140/147] tcg: Pass max_threads not max_cpus to tcg_init
` [PATCH 141/147] tcg: Move qemu_tcg_mttcg_enabled() to 'system/tcg.h'
` [PATCH 142/147] accel/tcg: Remove mttcg_enabled
` [PATCH 143/147] tcg: Convert TCGState::mttcg_enabled to TriState
` [PATCH 144/147] accel/tcg: Move mttcg warning to tcg_init_machine
` [PATCH 145/147] target/riscv: Remove AccelCPUClass::cpu_class_init need
` [PATCH 146/147] target/i386: "
` [PATCH 147/147] tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field
[RFC PATCH] buildsys: Disable 'unguarded-availability-new' warnings
2025-04-22 20:31 UTC (4+ messages)
[RFC PATCH v3 00/14] single-binary: Make hw/arm/ common
2025-04-22 18:49 UTC (13+ messages)
` [RFC PATCH v3 01/14] qapi: Rename TargetInfo structure as BinaryTargetInfo
` [RFC PATCH v3 13/14] qemu/target_info: Add target_aarch64() helper
[RFC PATCH v4 00/19] single-binary: Make hw/arm/ common
2025-04-22 18:30 UTC (51+ messages)
` [RFC PATCH v4 01/19] qapi: Rename TargetInfo structure as QemuTargetInfo
` [RFC PATCH v4 02/19] qemu: Convert target_name() to TargetInfo API
` [RFC PATCH v4 03/19] system/vl: Filter machine list available for a particular target binary
` [RFC PATCH v4 04/19] hw/arm: Register TYPE_TARGET_ARM/AARCH64_MACHINE QOM interfaces
` [RFC PATCH v4 05/19] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine
` [RFC PATCH v4 06/19] hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries
` [RFC PATCH v4 07/19] meson: Prepare to accept per-binary TargetInfo structure implementation
` [RFC PATCH v4 08/19] config/target: Implement per-binary TargetInfo structure (ARM, AARCH64)
` [RFC PATCH v4 09/19] hw/arm/aspeed: Build objects once
` [RFC PATCH v4 10/19] hw/arm/raspi: "
` [RFC PATCH v4 11/19] hw/core/machine: Allow dynamic registration of valid CPU types
` [RFC PATCH v4 12/19] hw/arm/virt: Register valid CPU types dynamically
` [RFC PATCH v4 13/19] hw/arm/virt: Check accelerator availability at runtime
` [RFC PATCH v4 14/19] qemu/target_info: Add %target_arch field to TargetInfo
` [RFC PATCH v4 15/19] qemu/target_info: Add target_aarch64() helper
` [RFC PATCH v4 16/19] hw/arm/virt: Replace TARGET_AARCH64 -> target_aarch64()
` [RFC PATCH v4 17/19] hw/core: Get default_cpu_type calling machine_class_default_cpu_type()
` [RFC PATCH v4 18/19] hw/core: Introduce MachineClass::get_default_cpu_type() helper
` [RFC PATCH v4 19/19] hw/arm/virt: Get default CPU type at runtime
[PATCH v4 000/163] tcg: Convert to TCGOutOp structures
2025-04-22 17:10 UTC (4+ messages)
` [PATCH v4 149/163] tcg: Remove add2/sub2 opcodes
[PATCH for 10.1 0/5] target/i386: TCG changes
2025-04-22 17:01 UTC (5+ messages)
` [PATCH 4/5] target/i386: tcg: remove tmp0
` [PATCH 5/5] target/i386: tcg: remove some more uses of temporaries
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