messages from 2025-04-24 00:49:07 to 2025-04-24 06:33:47 UTC [more...]
[RFC 00/10] i386/cpu: Cache CPUID fixup, Intel cache model & topo CPUID enhencement
2025-04-24 6:53 UTC (7+ messages)
` [RFC 01/10] i386/cpu: Mark CPUID[0x80000005] as reserved for Intel
` [RFC 05/10] i386/cpu: Introduce cache model for SapphireRapids
[PATCH v3 0/9] Add VNC Open H.264 Encoding
2025-04-24 6:19 UTC (6+ messages)
` [PATCH v3 2/9] add vnc h264 encoder
[PATCH 0/5] accel/kvm: Support KVM PMU filter
2025-04-24 6:33 UTC (8+ messages)
` [PATCH 1/5] qapi/qom: Introduce kvm-pmu-filter object
[PATCH for 10.1 v8 00/55] QEMU TDX support
2025-04-24 5:51 UTC (3+ messages)
` [PATCH v8 31/55] i386/cpu: introduce x86_confidential_guest_cpu_instance_init()
[PATCH 0/4] meson: Use osdep_prefix for strchrnul()
2025-04-24 4:50 UTC (5+ messages)
` [PATCH 1/4] meson: Use has_header_symbol() to check getcpu()
` [PATCH 2/4] meson: Remove CONFIG_STATX and CONFIG_STATX_MNT_ID
` [PATCH 3/4] meson: Share common C source prefixes
` [PATCH 4/4] meson: Use osdep_prefix for strchrnul()
[PATCH v4 0/3] target/loongarch: Improve feature gating for instruction translation
2025-04-24 4:28 UTC (9+ messages)
` [PATCH v4 3/3] target/loongarch: Guard 64-bit-only insn translation with TRANS64 macro
[PATCH v5 00/11] Support vbootrom for AST2700
2025-04-24 4:01 UTC (10+ messages)
` [PATCH v5 03/11] hw/arm/aspeed: Add vbootrom support on AST2700 EVB machines
` [PATCH v5 04/11] hw/arm/aspeed: Reuse rom_size variable for vbootrom setup
` [PATCH v5 06/11] hw/arm/aspeed: Add support for loading vbootrom image via "-bios"
[PULL 00/13] loongarch-to-apply queue
2025-04-24 2:33 UTC (10+ messages)
` [PULL 01/13] hw/intc/loongarch_pch_msi: Remove gpio input handler
` [PULL 02/13] target/loongarch: Move header file helper.h to directory tcg
` [PULL 03/13] target/loongarch: Add function loongarch_get_addr_from_tlb
` [PULL 04/13] target/loongarch: Move function get_dir_base_width to common directory
` [PULL 05/13] target/loongarch: Add stub function loongarch_get_addr_from_tlb
` [PULL 06/13] target/loongarch: Set function loongarch_map_address() with common code
` [PULL 07/13] target/loongarch: Define function loongarch_get_addr_from_tlb() non-static
` [PULL 08/13] target/loongarch: Move function loongarch_tlb_search to directory tcg
` [PULL 09/13] target/loongarch: Add static definition with function loongarch_tlb_search()
[PATCH v6 0/7] Report vfio-ap configuration changes
2025-04-24 1:04 UTC (3+ messages)
` [PATCH v6 6/7] linux-header: update-linux-header script changes
[PULL 000/148] single-binary patch queue
2025-04-24 0:49 UTC (149+ messages)
` [PULL 001/148] exec/tswap: target code can use TARGET_BIG_ENDIAN instead of target_words_bigendian()
` [PULL 002/148] exec/tswap: implement {ld, st}.*_p as functions instead of macros
` [PULL 003/148] exec/memory_ldst: extract memory_ldst declarations from cpu-all.h
` [PULL 004/148] exec/memory_ldst_phys: extract memory_ldst_phys "
` [PULL 005/148] exec/memory.h: make devend_memop "target defines" agnostic
` [PULL 006/148] codebase: prepare to remove cpu.h from exec/exec-all.h
` [PULL 007/148] exec/exec-all: remove dependency on cpu.h
` [PULL 008/148] exec/memory-internal: "
` [PULL 009/148] exec/ram_addr: "
` [PULL 010/148] system/kvm: make kvm_flush_coalesced_mmio_buffer() accessible for common code
` [PULL 011/148] exec/ram_addr: call xen_hvm_modified_memory only if xen is enabled
` [PULL 012/148] hw/xen: add stubs for various functions
` [PULL 013/148] system/xen: remove inline stubs
` [PULL 014/148] system/physmem: compilation unit is now common to all targets
` [PULL 015/148] include/exec/memory: extract devend_big_endian from devend_memop
` [PULL 016/148] include/exec/memory: move devend functions to memory-internal.h
` [PULL 017/148] system/memory: make compilation unit common
` [PULL 018/148] system/ioport: "
` [PULL 019/148] accel/tcg: Build user-exec-stub.c once
` [PULL 020/148] accel/tcg: Build plugin-gen.c once
` [PULL 021/148] accel/tcg: Fix cpu_ld*_code_mmu for user mode
` [PULL 022/148] include/exec: Use vaddr for *_mmu guest memory access routines
` [PULL 023/148] include/exec: Split out cpu-ldst-common.h
` [PULL 024/148] include/exec: Split out accel/tcg/cpu-mmu-index.h
` [PULL 025/148] include/exec: Inline *_mmuidx_ra memory operations
` [PULL 026/148] include/exec: Inline *_data_ra "
` [PULL 027/148] include/exec: Inline *_data "
` [PULL 028/148] include/exec: Inline *_code "
` [PULL 029/148] accel/tcg: Perform aligned atomic reads in translator_ld
` [PULL 030/148] accel/tcg: Use cpu_ld*_code_mmu in translator.c
` [PULL 031/148] accel/tcg: Implement translator_ld*_end
` [PULL 032/148] accel/tcg: Remove mmap_lock/unlock from watchpoint.c
` [PULL 033/148] include/exec: Split out mmap-lock.h
` [PULL 034/148] include/system: Move exec/memory.h to system/memory.h
` [PULL 035/148] include/system: Move exec/address-spaces.h to system/address-spaces.h
` [PULL 036/148] include/system: Move exec/ioport.h to system/ioport.h
` [PULL 037/148] include/system: Move exec/ram_addr.h to system/ram_addr.h
` [PULL 038/148] include/system: Move exec/ramblock.h to system/ramblock.h
` [PULL 039/148] accel/tcg: Remove unnecesary inclusion of memory-internal.h in cputlb.c
` [PULL 040/148] exec: Restrict memory-internal.h to system/
` [PULL 041/148] meson: Introduce top-level libuser_ss and libsystem_ss
` [PULL 042/148] gdbstub: Move syscalls.c out of common_ss
` [PULL 043/148] accel/tcg: Use libuser_ss and libsystem_ss
` [PULL 044/148] target/mips: Restrict semihosting tests to system mode
` [PULL 045/148] target/xtensa: "
` [PULL 046/148] semihosting: Move user-only implementation out-of-line
` [PULL 047/148] semihosting: Assert is_user in user-only semihosting_enabled
` [PULL 048/148] include/exec: Split out watchpoint.h
` [PULL 049/148] hw/core: Move unconditional files to libsystem_ss, libuser_ss
` [PULL 050/148] system: Move most files to libsystem_ss
` [PULL 051/148] plugins: Move api.c, core.c to libuser_ss, libsystem_ss
` [PULL 052/148] include/exec: Drop ifndef CONFIG_USER_ONLY from cpu-common.h
` [PULL 053/148] include/hw/core: Drop ifndef CONFIG_USER_ONLY from cpu.h
` [PULL 054/148] include/hw/intc: Remove ifndef CONFIG_USER_ONLY from armv7m_nvic.h
` [PULL 055/148] include/hw/s390x: Remove ifndef CONFIG_USER_ONLY in css.h
` [PULL 056/148] include/exec: Split out icount.h
` [PULL 057/148] include/exec: Protect icount_enabled from poisoned symbols
` [PULL 058/148] include/system: Remove ifndef CONFIG_USER_ONLY in qtest.h
` [PULL 059/148] include/qemu: Remove ifndef CONFIG_USER_ONLY from accel.h
` [PULL 060/148] target/riscv: Remove ifndef CONFIG_USER_ONLY from cpu_cfg.h
` [PULL 061/148] meson: Only allow CONFIG_USER_ONLY from certain source sets
` [PULL 062/148] exec/cpu-all: extract tlb flags defines to exec/tlb-flags.h
` [PULL 063/148] accel/tcg: Fix argument types of tlb_reset_dirty
` [PULL 064/148] accel/tcg: Pass CPUTLBEntryFull to tlb_reset_dirty_range_locked
` [PULL 065/148] accel/tcg: Rebuild full flags in tlb_reset_dirty_range_locked
` [PULL 066/148] include/exec: Move TLB_MMIO, TLB_DISCARD_WRITE to slow flags
` [PULL 067/148] include/exec: Move tb_{, set_}page_addr[01] to translation-block.h
` [PULL 068/148] accel/tcg: Move get_page_addr_code* declarations
` [PULL 069/148] accel/tcg: Remove page_protect
` [PULL 070/148] accel/tcg: Remove cpu-all.h, exec-all.h from tb-internal.h
` [PULL 071/148] target/rx: Fix copy/paste typo (riscv -> rx)
` [PULL 072/148] hw/core/cpu: Update CPUClass::mmu_index docstring
` [PULL 073/148] accel/tcg: Introduce TCGCPUOps::mmu_index() callback
` [PULL 074/148] target/alpha: Restrict SoftMMU mmu_index() to TCG
` [PULL 075/148] target/arm: "
` [PULL 076/148] target/avr: "
` [PULL 077/148] target/hppa: "
` [PULL 078/148] target/i386: Remove unused cpu_(ldub, stb)_kernel macros
` [PULL 079/148] target/i386: Restrict cpu_mmu_index_kernel() to TCG
` [PULL 080/148] target/i386: Restrict SoftMMU mmu_index() "
` [PULL 081/148] target/loongarch: "
` [PULL 082/148] target/m68k: "
` [PULL 083/148] target/microblaze: "
` [PULL 084/148] target/mips: "
` [PULL 085/148] target/openrisc: "
` [PULL 086/148] target/ppc: "
` [PULL 087/148] target/riscv: "
` [PULL 088/148] target/rx: "
` [PULL 089/148] target/s390x: "
` [PULL 090/148] target/sh4: "
` [PULL 091/148] target/sparc: "
` [PULL 092/148] target/tricore: "
` [PULL 093/148] target/xtensa: "
` [PULL 094/148] target/hexagon: Implement TCGCPUOps.mmu_index
` [PULL 095/148] hw/core/cpu: Remove CPUClass::mmu_index()
` [PULL 096/148] accel/tcg: Build translator.c twice
` [PULL 097/148] accel/tcg: Split out tlb-bounds.h
` [PULL 098/148] include/exec: Redefine tlb-flags with absolute values
` [PULL 099/148] page-vary: Move and rename qemu_target_page_bits_min
` [PULL 100/148] page-vary: Restrict scope of TARGET_PAGE_BITS_MIN
` [PULL 101/148] exec/cpu-all: move cpu_copy to linux-user/qemu.h
` [PULL 102/148] include/exec/cpu-all: move compile time check for CPUArchState to cpu-target.c
` [PULL 103/148] exec/cpu-all: remove system/memory include
` [PULL 104/148] exec/cpu-all: remove exec/page-protection include
` [PULL 105/148] exec/cpu-all: remove tswap include
` [PULL 106/148] exec/cpu-all: remove exec/cpu-interrupt include
` [PULL 107/148] accel/tcg: fix missing includes for TCG_GUEST_DEFAULT_MO
` [PULL 108/148] accel/tcg: fix missing includes for TARGET_HAS_PRECISE_SMC
` [PULL 109/148] exec/cpu-all: remove cpu include
` [PULL 110/148] exec/cpu-all: remove exec/target_page include
` [PULL 111/148] exec/cpu-all: transfer exec/cpu-common include to cpu.h headers
` [PULL 112/148] exec/cpu-all: remove this header
` [PULL 113/148] accel/kvm: move KVM_HAVE_MCE_INJECTION define to kvm-all.c
` [PULL 114/148] exec/poison: KVM_HAVE_MCE_INJECTION can now be poisoned
` [PULL 115/148] target/arm/cpu: always define kvm related registers
` [PULL 116/148] target/arm/cpu: flags2 is always uint64_t
` [PULL 117/148] target/arm/cpu: define same set of registers for aarch32 and aarch64
` [PULL 118/148] target/arm/cpu: remove inline stubs for aarch32 emulation
` [PULL 119/148] target/arm: Expose Aarch64 helpers unconditionally
` [PULL 120/148] meson: add common hw files
` [PULL 121/148] hw/arm/boot: make compilation unit hw common
` [PULL 122/148] hw/arm/digic_boards: prepare compilation unit to be common
` [PULL 123/148] hw/arm/xlnx-zynqmp: "
` [PULL 124/148] hw/arm/xlnx-versal: "
` [PULL 125/148] hw/arm: make most of the compilation units common
` [PULL 126/148] target/riscv: Do not expose rv128 CPU on user mode emulation
` [PULL 127/148] tcg: Include missing 'cpu.h' in translate-all.c
` [PULL 128/148] tcg: Declare TARGET_INSN_START_EXTRA_WORDS in 'cpu-param.h'
` [PULL 129/148] tcg: Always define TARGET_INSN_START_EXTRA_WORDS
` [PULL 130/148] exec: Restrict 'cpu-ldst-common.h' to accel/tcg/
` [PULL 131/148] exec: Restrict 'cpu_ldst.h' "
` [PULL 132/148] exec: Do not include 'accel/tcg/cpu-ldst.h' in 'exec-all.h'
` [PULL 133/148] tcg: Always define TCG_GUEST_DEFAULT_MO
` [PULL 134/148] tcg: Simplify tcg_req_mo() macro
` [PULL 135/148] tcg: Define guest_default_memory_order in TCGCPUOps
` [PULL 136/148] tcg: Remove use of TCG_GUEST_DEFAULT_MO in tb_gen_code()
` [PULL 137/148] tcg: Propagate CPUState argument to cpu_req_mo()
` [PULL 138/148] tcg: Have tcg_req_mo() use TCGCPUOps::guest_default_memory_order
` [PULL 139/148] tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally
` [PULL 140/148] tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h'
` [PULL 141/148] tcg: Pass max_threads not max_cpus to tcg_init
` [PULL 142/148] tcg: Move qemu_tcg_mttcg_enabled() to 'system/tcg.h'
` [PULL 143/148] accel/tcg: Remove mttcg_enabled
` [PULL 144/148] tcg: Convert TCGState::mttcg_enabled to TriState
` [PULL 145/148] accel/tcg: Move mttcg warning to tcg_init_machine
` [PULL 146/148] target/riscv: Remove AccelCPUClass::cpu_class_init need
` [PULL 147/148] target/i386: "
` [PULL 148/148] tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field
[PATCH 00/15] accel/tcg: Compile tb-maint.c twice
2025-04-24 1:19 UTC (16+ messages)
` [PATCH 01/15] accel/tcg: Add CPUState argument to page_unprotect
` [PATCH 02/15] accel/tcg: Add CPUState argument to tb_invalidate_phys_page_unwind
` [PATCH 03/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_page_range__locked
` [PATCH 04/15] accel/tcg: Merge tb_invalidate_phys_range{__locked}
` [PATCH 05/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range
` [PATCH 06/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range_fast
` [PATCH 07/15] accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc
` [PATCH 08/15] accel/tcg: Simplify CPU_TLB_DYN_MAX_BITS
` [PATCH 09/15] accel/tcg: Simplify L1_MAP_ADDR_SPACE_BITS
` [PATCH 10/15] accel/tcg: Merge internal-target.h into internal-common.h
` [PATCH 11/15] accel/tcg: Reduce scope of tb_phys_invalidate, tb_set_jmp_target
` [PATCH 12/15] accel/tcg: Use vaddr for walk_memory_regions callback
` [PATCH 13/15] accel/tcg: Use vaddr in user/page-protection.h
` [PATCH 14/15] include/exec: Move tb_invalidate_phys_range to translation-block.h
` [PATCH 15/15] accel/tcg: Compile tb-maint.c twice
[PATCH 10.1 v3 00/27] target/riscv: SATP mode and CPU definition overhaul
2025-04-24 1:26 UTC (6+ messages)
` [PATCH 14/27] target/riscv: convert abstract CPU classes to RISCVCPUDef
` [PATCH 27/27] target/riscv: remove .instance_post_init
[PATCH] hw/intc/loongarch_pch_msi: Remove gpio input handler
2025-04-24 1:15 UTC (2+ messages)
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).