messages from 2025-06-20 22:20:24 to 2025-06-22 02:20:14 UTC [more...]
[RFC PATCH RESEND 00/42] accel/split/arm: Run EL2 using TCG and EL1/EL0 in hardware with HVF
2025-06-22 2:19 UTC (37+ messages)
` [RFC PATCH RESEND 01/42] accel/split: Minimal stubs for split accelerator
` [RFC PATCH RESEND 02/42] accel/split: Define SplitAccelState
` [RFC PATCH RESEND 03/42] accel/split: Implement cpus_are_resettable()
` [RFC PATCH RESEND 04/42] accel/split: Implement accel_init_machine()
` [RFC PATCH RESEND 05/42] accel/split: Expose 'hw' and 'sw' properties
` [RFC PATCH RESEND 07/42] accel/split: Implement supports_guest_debug()
` [RFC PATCH RESEND 09/42] accel/split: Add cpu_thread_routine() stub
` [RFC PATCH RESEND 10/42] accel/split: Define and allocate AccelCPUState
` [RFC PATCH RESEND 11/42] accel/split: Register MTTCG
` [RFC PATCH RESEND 12/42] accel/split: Have thread routine ready to dispatch over HW/SW
` [RFC PATCH RESEND 13/42] accel/split: Implement cpu_reset_hold()
` [RFC PATCH RESEND 14/42] accel/split: Implement synchronize_post_init()
` [RFC PATCH RESEND 15/42] accel/split: Implement synchronize_pre_resume()
` [RFC PATCH RESEND 16/42] accel/split: Implement synchronize_state()
` [RFC PATCH RESEND 17/42] accel/split: Implement synchronize_post_reset()
` [RFC PATCH RESEND 18/42] accel/split: Implement synchronize_pre_loadvm()
` [RFC PATCH RESEND 19/42] accel/split: Implement kick_vcpu_thread()
` [RFC PATCH RESEND 23/42] target/arm: Implement SysemuCPUOps::can_accelerate() handler
` [RFC PATCH RESEND 24/42] accel/split: Implement handle_interrupt()
` [RFC PATCH RESEND 25/42] accel/split: Empty ops_init()
` [RFC PATCH RESEND 26/42] accel/split: Empty set/get_virtual_clock()
` [RFC PATCH RESEND 27/42] accel/split: Empty get_elapsed_ticks()
` [RFC PATCH RESEND 28/42] accel/split: Empty cpu_thread_is_idle()
` [RFC PATCH RESEND 29/42] accel/split: Kludge qemu_tcg_mttcg_enabled()
` [RFC PATCH RESEND 31/42] accel/split: Implement remove_breakpoint()
` [RFC PATCH RESEND 34/42] accel/split: Implement get_[vcpu]_stats()
` [RFC PATCH RESEND 35/42] target/arm: Emulate EL2 under TCG
` [RFC PATCH RESEND 36/42] target/arm: Have ERET switch to hw accel for EL0/EL1
` [RFC PATCH RESEND 37/42] accel/hvf: Emulate HVC at EL2
` [RFC PATCH RESEND 38/42] accel/tcg: Introduce TCGCPUOps::rebuild_tb_hflags handler
` [RFC PATCH RESEND 39/42] target/arm: Implement TCGCPUOps::rebuild_tb_hflags()
` [RFC PATCH RESEND 40/42] accel/split: Call TCGCPUOps::rebuild_tb_hflags()
` [RFC PATCH RESEND 41/42] tests/functional: Add split_available() helper
` [RFC PATCH RESEND 42/42] tests/functional: Test Aarch64 virt machine with split-accelerator
[RFC PATCH v2 00/48] accel: Preparatory cleanups for split-accel
2025-06-22 2:14 UTC (65+ messages)
` [RFC PATCH v2 01/48] system/runstate: Document qemu_add_vm_change_state_handler()
` [RFC PATCH v2 03/48] system/cpus: Assert interrupt handling is done with BQL locked
` [RFC PATCH v2 04/48] accel/kvm: Remove kvm_init_cpu_signals() stub
` [RFC PATCH v2 05/48] accel/kvm: Reduce kvm_create_vcpu() declaration scope
` [RFC PATCH v2 10/48] accel: Pass AccelState argument to gdbstub_supported_sstep_flags()
` [RFC PATCH v2 11/48] accel: Move supports_guest_debug() declaration to AccelClass
` [RFC PATCH v2 12/48] accel: Move cpus_are_resettable() "
` [RFC PATCH v2 13/48] accel: Move cpu_common_[un]realize() declarations to AccelOpsClass
` [RFC PATCH v2 15/48] accel/system: Add 'info accel' on human monitor
` [RFC PATCH v2 16/48] accel/tcg: Factor tcg_dump_flush_info() out
` [RFC PATCH v2 17/48] accel/tcg: Implement get_[vcpu]_stats()
` [RFC PATCH v2 18/48] accel/hvf: Implement get_vcpu_stats()
` [RFC PATCH v2 19/48] cpus: Document CPUState::vcpu_dirty field
` [RFC PATCH v2 20/48] cpus: Rename 'vcpu_dirty' field as negated 'hwaccel_synchronized'
` [RFC PATCH v2 24/48] accel/kvm: Remove kvm_cpu_synchronize_state() stub
` [RFC PATCH v2 25/48] accel/system: Document cpu_synchronize_state()
` [RFC PATCH v2 26/48] accel/system: Document cpu_synchronize_state_post_init/reset()
` [RFC PATCH v2 27/48] accel/dummy: Factor dummy_thread_precreate() out
` [RFC PATCH v2 28/48] accel/dummy: Factor tcg_vcpu_thread_precreate() out
` [RFC PATCH v2 29/48] accel: Factor accel_create_vcpu_thread() out
` [RFC PATCH v2 30/48] accel: Introduce AccelOpsClass::cpu_thread_routine handler
` [RFC PATCH v2 31/48] accel/dummy: Convert to AccelOpsClass::cpu_thread_routine
` [RFC PATCH v2 32/48] accel/tcg: "
` [RFC PATCH v2 33/48] accel/hvf: "
` [RFC PATCH v2 34/48] accel/kvm: "
` [RFC PATCH v2 35/48] accel/nvmm: "
` [RFC PATCH v2 36/48] accel/whpx: "
` [RFC PATCH v2 37/48] accel/nvmm: Expose nvmm_enabled() to common code
` [RFC PATCH v2 38/48] accel/whpx: Expose whpx_enabled() "
` [RFC PATCH v2 39/48] accel/system: Introduce hwaccel_enabled() helper
` [RFC PATCH v2 40/48] accel: Factor accel_cpu_realize() out
` [RFC PATCH v2 41/48] accel/tcg: Factor tcg_vcpu_init() out for re-use
FreeBSD 14.1 aarch64 iso URL is down
2025-06-22 1:46 UTC (2+ messages)
[PATCH v2 00/26] arm: Fixes and preparatory cleanups for split-accel
2025-06-22 0:40 UTC (33+ messages)
` [PATCH v2 04/26] target/arm/hvf: Simplify GIC hvf_arch_init_vcpu()
` [PATCH v2 05/26] target/arm/hvf: Directly re-lock BQL after hv_vcpu_run()
` [PATCH v2 07/26] accel/hvf: Trace VM memory mapping
` [PATCH v2 09/26] target/arm: Correct KVM & HVF dtb_compatible value
` [PATCH v2 10/26] accel/hvf: Model PhysTimer register
` [PATCH v2 11/26] target/arm/hvf: Pass @target_el argument to hvf_raise_exception()
` [PATCH v2 12/26] target/arm: Restrict system register properties to system binary
` [PATCH v2 13/26] target/arm: Create GTimers *after* features finalized / accel realized
` [PATCH v2 15/26] accel: Introduce AccelOpsClass::cpu_target_realize() hook
` [PATCH v2 16/26] accel/hvf: Add hvf_arch_cpu_realize() stubs
` [PATCH v2 18/26] target/arm/hvf: Trace host processor features
` [PATCH v2 21/26] hw/arm/virt: Rename cpu_post_init() -> post_cpus_gic_realized()
` [PATCH v2 22/26] hw/arm/sbsa-ref: Tidy up use of RAMLIMIT_GB definition
` [PATCH v2 23/26] tests/functional: Restrict nexted Aarch64 Xen test to TCG
` [PATCH v2 24/26] tests/functional: Require TCG to run Aarch64 imx8mp-evk test
` [PATCH v2 25/26] tests/functional: Add hvf_available() helper
[PATCH v2 000/101] target/arm: Implement FEAT_SME2p1
2025-06-21 23:50 UTC (102+ messages)
` [PATCH v2 001/101] tcg: Add dbase argument to do_dup_store
` [PATCH v2 002/101] tcg: Add dbase argument to do_dup
` [PATCH v2 003/101] tcg: Add dbase argument to expand_clr
` [PATCH v2 004/101] tcg: Add base arguments to check_overlap_[234]
` [PATCH v2 005/101] tcg: Split out tcg_gen_gvec_2_var
` [PATCH v2 006/101] tcg: Split out tcg_gen_gvec_3_var
` [PATCH v2 007/101] tcg: Split out tcg_gen_gvec_mov_var
` [PATCH v2 008/101] tcg: Split out tcg_gen_gvec_{add,sub}_var
` [PATCH v2 009/101] tcg: Split out tcg_gen_gvec_dup_imm_var
` [PATCH v2 010/101] linux-user/aarch64: Update hwcap bits from 6.14
` [PATCH v2 011/101] target/arm: Remove CPUARMState.vfp.scratch
` [PATCH v2 012/101] target/arm: Introduce FPST_ZA, FPST_ZA_F16
` [PATCH v2 013/101] target/arm: Use FPST_ZA for sme_fmopa_[hsd]
` [PATCH v2 014/101] target/arm: Rename zarray to za_state.za
` [PATCH v2 015/101] target/arm: Add isar feature tests for SME2, SVE2p1
` [PATCH v2 016/101] target/arm: Add ZT0
` [PATCH v2 017/101] target/arm: Add zt0_excp_el to DisasContext
` [PATCH v2 018/101] target/arm: Implement SME2 ZERO ZT0
` [PATCH v2 019/101] target/arm: Implement SME2 LDR/STR ZT0
` [PATCH v2 020/101] target/arm: Implement SME2 MOVT
` [PATCH v2 021/101] target/arm: Split get_tile_rowcol argument tile_index
` [PATCH v2 022/101] target/arm: Rename MOVA for translate
` [PATCH v2 023/101] target/arm: Implement SME2 MOVA to/from tile, multiple registers
` [PATCH v2 024/101] target/arm: Split out get_zarray
` [PATCH v2 025/101] target/arm: Implement SME2 MOVA to/from array, multiple registers
` [PATCH v2 026/101] target/arm: Implement SME2 BMOPA
` [PATCH v2 027/101] target/arm: Implement SME2 SMOPS, UMOPS (2-way)
` [PATCH v2 028/101] target/arm: Introduce gen_gvec_sve2_sqdmulh
` [PATCH v2 029/101] target/arm: Implement SME2 Multiple and Single SVE Destructive
` [PATCH v2 030/101] target/arm: Implement SME2 Multiple Vectors "
` [PATCH v2 031/101] target/arm: Implement SME2 ADD/SUB (array results, multiple and single vector)
` [PATCH v2 032/101] target/arm: Implement SME2 ADD/SUB (array results, multiple vectors)
` [PATCH v2 033/101] target/arm: Pass ZA to helper_sve2_fmlal_zz[zx]w_s
` [PATCH v2 034/101] target/arm: Implement SME2 FMLAL, BFMLAL
` [PATCH v2 035/101] target/arm: Implement SME2 FDOT
` [PATCH v2 036/101] target/arm: Implement SME2 BFDOT
` [PATCH v2 037/101] target/arm: Implement SME2 FVDOT, BFVDOT
` [PATCH v2 038/101] target/arm: Rename helper_gvec_*dot_[bh] to *_4[bh]
` [PATCH v2 039/101] target/arm: Remove helper_gvec_sudot_idx_4b
` [PATCH v2 040/101] target/arm: Implemement SME2 SDOT, UDOT, USDOT, SUDOT
` [PATCH v2 041/101] target/arm: Rename SVE SDOT and UDOT patterns
` [PATCH v2 042/101] target/arm: Tighten USDOT (vectors) decode
` [PATCH v2 043/101] target/arm: Implement SDOT, UDOT (2-way) for SME2/SVE2p1
` [PATCH v2 044/101] target/arm: Implement SME2 SVDOT, UVDOT, SUVDOT, USVDOT
` [PATCH v2 045/101] target/arm: Implement SME2 SMLAL, SMLSL, UMLAL, UMLSL
` [PATCH v2 046/101] target/arm: Implement SME2 SMLALL, SMLSLL, UMLALL, UMLSLL
` [PATCH v2 047/101] target/arm: Rename gvec_fml[as]_[hs] with _nf_ infix
` [PATCH v2 048/101] target/arm: Implement SME2 FMLA, FMLS
` [PATCH v2 049/101] target/arm: Implement SME2 BFMLA, BFMLS
` [PATCH v2 050/101] target/arm: Implement SME2 FADD, FSUB, BFADD, BFSUB
` [PATCH v2 051/101] target/arm: Implement SME2 BFCVT, BFCVTN, FCVT, FCVTN
` [PATCH v2 052/101] target/arm: Implement SME2 FCVT (widening), FCVTL
` [PATCH v2 053/101] target/arm: Implement SME2 FCVTZS, FCVTZU
` [PATCH v2 054/101] target/arm: Implement SME2 SCVTF, UCVTF
` [PATCH v2 055/101] target/arm: Implement SME2 FRINTN, FRINTP, FRINTM, FRINTA
` [PATCH v2 056/101] target/arm: Introduce do_[us]sat_[bhs] macros
` [PATCH v2 057/101] target/arm: Use do_[us]sat_[bhs] in sve_helper.c
` [PATCH v2 058/101] target/arm: Implement SME2 SQCVT, UQCVT, SQCVTU
` [PATCH v2 059/101] target/arm: Implement SQCVTN, UQCVTN, SQCVTUN for SME2/SVE2p1
` [PATCH v2 060/101] target/arm: Implement SME2 SUNPK, UUNPK
` [PATCH v2 061/101] target/arm: Implement SME2 ZIP, UZP (four registers)
` [PATCH v2 062/101] target/arm: Move do_urshr, do_srshr to vec_internal.h
` [PATCH v2 063/101] target/arm: Implement SME2 SQRSHR, UQRSHR, SQRSHRN
` [PATCH v2 064/101] target/arm: Implement SME2 ZIP, UZP (two registers)
` [PATCH v2 065/101] target/arm: Implement SME2 FCLAMP, SCLAMP, UCLAMP
` [PATCH v2 066/101] target/arm: Enable SCLAMP, UCLAMP for SVE2p1
` [PATCH v2 067/101] target/arm: Implement FCLAMP for SME2, SVE2p1
` [PATCH v2 068/101] target/arm: Implement SME2 SEL
` [PATCH v2 069/101] target/arm: Implement SME2p1 Multiple Zero
` [PATCH v2 070/101] target/arm: Introduce pred_count_test
` [PATCH v2 071/101] target/arm: Fold predtest_ones into helper_sve_brkns
` [PATCH v2 072/101] target/arm: Split out do_whilel from helper_sve_whilel
` [PATCH v2 073/101] target/arm: Split out do_whileg from helper_sve_whileg
` [PATCH v2 074/101] target/arm: Move scale by esz into helper_sve_while*
` [PATCH v2 075/101] target/arm: Split trans_WHILE to lt and gt
` [PATCH v2 076/101] target/arm: Implement SVE2p1 WHILE (predicate pair)
` [PATCH v2 077/101] target/arm: Implement SVE2p1 WHILE (predicate as counter)
` [PATCH v2 078/101] target/arm: Implement SVE2p1 PTRUE "
` [PATCH v2 079/101] target/arm: Enable PSEL for SVE2p1
` [PATCH v2 080/101] target/arm: Implement {ADD, SMIN, SMAX, UMIN, UMAX}QV "
` [PATCH v2 081/101] target/arm: Implement SVE2p1 PEXT
` [PATCH v2 082/101] target/arm: Implement ANDQV, ORQV, EORQV for SVE2p1
` [PATCH v2 083/101] target/arm: Implement FADDQV, F{MIN, MAX}{NM}QV "
` [PATCH v2 084/101] target/arm: Implement BFMLSLB{L, T} for SME2/SVE2p1
` [PATCH v2 085/101] target/arm: Implement CNTP (predicate as counter) "
` [PATCH v2 086/101] target/arm: Implement DUPQ for SME2p1/SVE2p1
` [PATCH v2 087/101] target/arm: Implement EXTQ "
` [PATCH v2 088/101] target/arm: Implement PMOV "
` [PATCH v2 089/101] target/arm: Implement ZIPQ, UZPQ "
` [PATCH v2 090/101] target/arm: Implement TBLQ, TBXQ "
` [PATCH v2 091/101] target/arm: Implement SME2 counted predicate register load/store
` [PATCH v2 092/101] target/arm: Split the ST_zpri and ST_zprr patterns
` [PATCH v2 093/101] target/arm: Implement {LD1, ST1}{W, D} (128-bit element) for SVE2p1
` [PATCH v2 094/101] target/arm: Move ld1qq and st1qq primitives to sve_ldst_internal.h
` [PATCH v2 095/101] target/arm: Implement {LD, ST}[234]Q for SME2p1/SVE2p1
` [PATCH v2 096/101] target/arm: Implement LD1Q, ST1Q for SVE2p1
` [PATCH v2 097/101] target/arm: Implement LUTI2, LUTI4 for SME2/SME2p1
` [PATCH v2 098/101] target/arm: Implement MOVAZ for SME2p1
` [PATCH v2 099/101] linux-user/aarch64: Set hwcap bits for SME2p1/SVE2p1
` [PATCH v2 100/101] target/arm: Enable FEAT_SME2p1 on -cpu max
` [PATCH v2 101/101] tests/tcg/aarch64: Add sme2-matmul test case
[PATCH v4 00/19] vfio-user client
2025-06-21 14:50 UTC (5+ messages)
[PATCH v3 00/23] vfio-user client
2025-06-21 12:22 UTC (7+ messages)
[PATCH RFC 00/16] virtio: introduce support for GSO over UDP tunnel
2025-06-21 6:39 UTC (4+ messages)
[PULL 00/17] maintainer updates for May (testing, plugins, virtio-gpu)
2025-06-21 5:59 UTC (7+ messages)
` [PULL 12/17] virtio-gpu: support context init multiple timeline
[PATCH v2] vdpa: Allow VDPA to work on big-endian machine
2025-06-21 5:52 UTC (2+ messages)
[PATCH v3] hw/riscv/virt: Add acpi ged and powerdown support
2025-06-21 0:59 UTC
[PULL 00/14] loongarch-to-apply queue
2025-06-20 18:12 UTC (4+ messages)
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