messages from 2025-10-01 06:49:15 to 2025-10-01 15:12:11 UTC [more...]
[PATCH 00/22] hw/core/cpu: Remove @CPUState::as field
2025-10-01 15:05 UTC (13+ messages)
` [PATCH 01/22] system/qtest: Use &address_space_memory for first vCPU address space
` [PATCH 02/22] disas/disas-mon: Get cpu first addr space with cpu_get_address_space()
` [PATCH 03/22] monitor/hmp-cmds: "
` [PATCH 04/22] hw/core/loader: "
` [PATCH 06/22] hw/m86k: "
` [PATCH 07/22] target/xtensa: "
` [PATCH 08/22] target/riscv: "
` [PATCH 09/22] semihosting: "
` [PATCH 10/22] target/alpha: "
` [PATCH 11/22] target/arm: "
` [PATCH 12/22] target/hppa: "
` [PATCH 17/22] target/ppc: "
[PATCH 00/25] system/physmem: Extract API out of 'system/ram_addr.h' header
2025-10-01 15:06 UTC (36+ messages)
` [PATCH 01/25] system/ram_addr: Remove unnecessary 'exec/cpu-common.h' header
` [PATCH 02/25] accel/kvm: Include missing 'exec/target_page.h' header
` [PATCH 03/25] hw/s390x/s390-stattrib: "
` [PATCH 04/25] hw/vfio/listener: "
` [PATCH 05/25] target/arm/tcg/mte: "
` [PATCH 06/25] hw: Remove unnecessary 'system/ram_addr.h' header
` [PATCH 07/25] accel/tcg: Document rcu_read_lock is held when calling tlb_reset_dirty()
` [PATCH 08/25] accel/tcg: Rename @start argument of tlb_reset_dirty*()
` [PATCH 09/25] system/physmem: Rename @start argument of physical_memory_get_dirty()
` [PATCH 10/25] system/physmem: Un-inline cpu_physical_memory_get_dirty_flag()
` [PATCH 11/25] system/physmem: Un-inline cpu_physical_memory_is_clean()
` [PATCH 12/25] system/physmem: Rename @start argument of physical_memory_all_dirty()
` [PATCH 13/25] system/physmem: Rename @start argument of physical_memory_range*()
` [PATCH 14/25] system/physmem: Un-inline cpu_physical_memory_range_includes_clean()
` [PATCH 15/25] system/physmem: Un-inline cpu_physical_memory_set_dirty_flag()
` [PATCH 16/25] system/physmem: Rename @start argument of physical_memory_*range()
` [PATCH 17/25] system/physmem: Un-inline cpu_physical_memory_set_dirty_range()
` [PATCH 18/25] system/physmem: Un-inline cpu_physical_memory_set_dirty_lebitmap()
` [PATCH 19/25] system/physmem: Rename @start argument of physmem_dirty_bits_cleared()
` [PATCH 20/25] system/physmem: Un-inline cpu_physical_memory_dirty_bits_cleared()
` [PATCH 21/25] system/physmem: Rename @start argument of physmem_test_and_clear_dirty()
` [PATCH 22/25] system/physmem: Reduce cpu_physical_memory_clear_dirty_range() scope
` [PATCH 23/25] system/physmem: Reduce cpu_physical_memory_sync_dirty_bitmap() scope
` [PATCH 24/25] system/physmem: Drop 'cpu_' prefix in Physical Memory API
` [PATCH 25/25] system/physmem: Extract API out of 'system/ram_addr.h' header
[PATCH V2] migration-test: test cpr-exec
2025-10-01 14:53 UTC
[PATCH 0/4] migration: Introduce POSTCOPY_DEVICE state
2025-10-01 14:26 UTC (10+ messages)
` [PATCH 4/4] "
[PATCH] migration-test: fix migrate_args
2025-10-01 14:05 UTC (2+ messages)
[PATCH v4 00/27] hw/arm/virt: Add support for user-creatable accelerated SMMUv3
2025-10-01 14:01 UTC (27+ messages)
` [PATCH v4 14/27] hw/arm/smmuv3-accel: Get host SMMUv3 hw info and validate
` [PATCH v4 15/27] acpi/gpex: Fix PCI Express Slot Information function 0 returned value
` [PATCH v4 16/27] hw/pci-host/gpex: Allow to generate preserve boot config DSM #5
` [PATCH v4 17/27] hw/arm/virt: Set PCI preserve_config for accel SMMUv3
` [PATCH v4 18/27] hw/arm/virt-acpi-build: Add IORT RMR regions to handle MSI nested binding
` [PATCH v4 19/27] hw/arm/smmuv3-accel: Install S1 bypass hwpt on reset
` [PATCH v4 21/27] hw/arm/smmuv3-accel: Add a property to specify RIL support
` [PATCH v4 22/27] hw/arm/smmuv3-accel: Add support for ATS
` [PATCH v4 23/27] hw/arm/smmuv3-accel: Add property to specify OAS bits
` [PATCH v4 24/27] backends/iommufd: Retrieve PASID width from iommufd_backend_get_device_info()
` [PATCH v4 25/27] backends/iommufd: Add a callback helper to retrieve PASID support
` [PATCH v4 26/27] vfio: Synthesize vPASID capability to VM
` [PATCH v4 27/27] hw.arm/smmuv3: Add support for PASID enable
[RFC PATCH 0/7] Add RISCV big endian support
2025-10-01 13:47 UTC (3+ messages)
[PULL 00/23] Rust ci patches
2025-10-01 13:29 UTC (2+ messages)
[PULL 0/5] Ui patches
2025-10-01 13:29 UTC (2+ messages)
[PATCH v4 00/27] Implementing a MSHV (Microsoft Hypervisor) accelerator
2025-10-01 12:49 UTC (23+ messages)
` [PATCH v4 01/27] accel: Add Meson and config support for MSHV accelerator
` [PATCH v4 03/27] target/i386/mshv: Add x86 decoder/emu implementation
` [PATCH v4 04/27] hw/intc: Generalize APIC helper names from kvm_* to accel_*
` [PATCH v4 06/27] linux-headers/linux: Add mshv.h headers
` [PATCH v4 09/27] accel/mshv: Initialize VM partition
` [PATCH v4 10/27] accel/mshv: Add vCPU creation and execution loop
` [PATCH v4 24/27] qapi/accel: Allow to query mshv capabilities
` [PATCH v4 25/27] target/i386/mshv: Use preallocated page for hvcall
` [PATCH v4 26/27] docs: Add mshv to documentation
` [PATCH v4 27/27] MAINTAINERS: Add maintainers for mshv accelerator
[PATCH] block/curl.c: Use explicit long constants in curl_easy_setopt calls
2025-10-01 12:40 UTC
[PATCH V1 00/11] cpr-exec test
2025-10-01 12:16 UTC (6+ messages)
` [PATCH V1 09/11] migration-test: migrate_args
[PATCH v2 00/27] CI/build-sys fixes to enable Rust more widely
2025-10-01 11:30 UTC (4+ messages)
` [PATCH v2 27/27] WIP: enable rust for wasm/emscripten
[QUESTION] aarch64=off with TCG
2025-10-01 11:28 UTC (3+ messages)
[PATCH] mips: pass code of conditional trap
2025-10-01 11:18 UTC (6+ messages)
[PATCH v9 00/13] riscv: Add support for MIPS P8700 CPU
2025-10-01 11:15 UTC (15+ messages)
` [PATCH v9 01/13] hw/intc: Allow gaps in hartids for aclint and aplic
` [PATCH v9 04/13] target/riscv: Add MIPS P8700 CSRs
` [PATCH v9 03/13] target/riscv: Add MIPS P8700 CPU
` [PATCH v9 02/13] target/riscv: Add cpu_set_exception_base
` [PATCH v9 06/13] target/riscv: Add mips.pref instruction
` [PATCH v9 05/13] target/riscv: Add mips.ccmov instruction
` [PATCH v9 07/13] target/riscv: Add Xmipslsp instructions
` [PATCH v9 08/13] hw/misc: Add RISC-V CMGCR device implementation
` [PATCH v9 09/13] hw/misc: Add RISC-V CPC "
` [PATCH v9 10/13] hw/riscv: Add support for RISCV CPS
` [PATCH v9 12/13] riscv/boston-aia: Add an e1000e NIC in slot 0 func 1
` [PATCH v9 11/13] hw/riscv: Add support for MIPS Boston-aia board mode
` [PATCH v9 13/13] test/functional: Add test for boston-aia board
[PATCH] pcie_sriov: make pcie_sriov_pf_exit() safe on non-SR-IOV devices
2025-10-01 10:17 UTC (4+ messages)
[PATCH v7 0/5] NVMe: Add SPDM over the storage transport support
2025-10-01 9:55 UTC (6+ messages)
` [PATCH v7 2/5] spdm: add spdm storage transport virtual header
[PATCH v8 00/14] riscv: Add support for MIPS P8700 CPU
2025-10-01 9:48 UTC (10+ messages)
` [PATCH v8 02/14] target/riscv: Add cpu_set_exception_base
` [PATCH v8 06/14] target/riscv: Add mips.pref instruction
` [PATCH v8 08/14] hw/misc: Add RISC-V CMGCR device implementation
[PATCH v4 0/3] Support VBOOTROM to ast2700fc machine
2025-10-01 8:44 UTC (6+ messages)
` [PATCH v4 2/3] hw/arm/aspeed_ast27x0-fc: Add VBOOTROM support
` [PATCH v4 3/3] tests/functional/aarch64/test_aspeed_ast2700fc: Add vbootrom test
[PATCH] hw/arm: Remove sl_bootparam_write() and 'hw/arm/sharpsl.h' header
2025-10-01 8:40 UTC
[PATCH v2 00/33] single-binary: Make riscv cpu.h target independent
2025-10-01 8:28 UTC (45+ messages)
` [PATCH v2 01/33] target/riscv: Use 32 bits for misa extensions
` [PATCH v2 02/33] target/riscv: Fix size of trivial CPUArchState fields
` [PATCH v2 03/33] target/riscv: Fix size of mhartid
` [PATCH v2 04/33] target/riscv: Bugfix riscv_pmu_ctr_get_fixed_counters_val()
` [PATCH v2 05/33] target/riscv: Combine mhpmevent and mhpmeventh
` [PATCH v2 06/33] target/riscv: Combine mcyclecfg and mcyclecfgh
` [PATCH v2 07/33] target/riscv: Combine minstretcfg and minstretcfgh
` [PATCH v2 08/33] target/riscv: Combine mhpmcounter and mhpmcounterh
` [PATCH v2 09/33] target/riscv: Fix size of gpr and gprh
` [PATCH v2 10/33] target/riscv: Fix size of vector CSRs
` [PATCH v2 11/33] target/riscv: Fix size of pc, load_[val|res]
` [PATCH v2 12/33] target/riscv: Fix size of frm and fflags
` [PATCH v2 13/33] target/riscv: Fix size of badaddr and bins
` [PATCH v2 14/33] target/riscv: Fix size of guest_phys_fault_addr
` [PATCH v2 15/33] target/riscv: Fix size of priv_ver and vext_ver
` [PATCH v2 16/33] target/riscv: Fix size of retxh
` [PATCH v2 17/33] target/riscv: Fix size of ssp
` [PATCH v2 18/33] target/riscv: Fix size of excp_uw2
` [PATCH v2 19/33] target/riscv: Fix size of sw_check_code
` [PATCH v2 20/33] target/riscv: Fix size of priv
` [PATCH v2 21/33] target/riscv: Fix size of gei fields
` [PATCH v2 22/33] target/riscv: Fix size of [m|s|vs]iselect fields
` [PATCH v2 23/33] target/riscv: Fix arguments to board IMSIC emulation callbacks
` [PATCH v2 24/33] target/riscv: Fix size of irq_overflow_left
` [PATCH v2 25/33] target/riscv: Indent PMUFixedCtrState correctly
` [PATCH v2 26/33] target/riscv: Replace target_ulong in riscv_cpu_get_trap_name()
` [PATCH v2 27/33] target/riscv: Replace target_ulong in riscv_ctr_add_entry()
` [PATCH v2 28/33] target/riscv: Fix size of trigger data
` [PATCH v2 29/33] target/riscv: Fix size of mseccfg
` [PATCH v2 30/33] target/riscv: Move debug.h include away from cpu.h
` [PATCH v2 31/33] target/riscv: Move CSR declarations to separate csr.h header
` [PATCH v2 32/33] target/riscv: Introduce externally facing CSR access functions
` [PATCH v2 33/33] target/riscv: Make pmp.h target_ulong agnostic
[PATCH 00/11] rust: migration: add high-level migration wrappers
2025-10-01 8:00 UTC (27+ messages)
` [PATCH 01/11] rust: bql: add BqlRefCell::get_mut()
` [PATCH 02/11] rust: migration: do not pass raw pointer to VMStateDescription::fields
` [PATCH 03/11] rust: migration: do not store raw pointers into VMStateSubsectionsWrapper
` [PATCH 04/11] rust: migration: validate termination of subsection arrays
` [PATCH 05/11] rust: migration: extract vmstate_fields_ref
` [PATCH 06/11] rust: move VMState from bql to migration
` [PATCH 07/11] rust: migration: add high-level migration wrappers
` [PATCH 08/11] rust: qemu-macros: add ToMigrationState derive macro
` [PATCH 09/11] timer: constify some functions
` [PATCH 10/11] rust: migration: implement ToMigrationState for Timer
` [PATCH 11/11] rust: migration: implement ToMigrationState as part of impl_vmstate_bitsized
` [PATCH preview 00/14] rust: QObject and QAPI bindings
` [PATCH 01/14] qobject: make refcount atomic
` [PATCH 02/14] rust: add basic QObject bindings
` [PATCH 03/14] subprojects: add serde
` [PATCH 04/14] rust: add Serialize implementation for QObject
` [PATCH 05/14] rust: add Serializer (to_qobject) "
` [PATCH 06/14] rust: add Deserialize "
` [PATCH 07/14] rust: add Deserializer (from_qobject) "
` [PATCH 08/14] rust/qobject: add Display/Debug
` [PATCH 09/14] scripts/qapi: add QAPISchemaIfCond.rsgen()
` [PATCH 10/14] scripts/qapi: generate high-level Rust bindings
` [PATCH 11/14] scripts/qapi: strip trailing whitespaces
` [PATCH 12/14] scripts/rustc_args: add --no-strict-cfg
` [PATCH 13/14] rust/util: build QAPI types
` [PATCH 14/14] rust: start qapi tests
[PATCH 0/2] rust: do not generate GLib bindings
2025-10-01 7:49 UTC (3+ messages)
` [PATCH 1/2] subprojects: add glib-sys-rs
` [PATCH 2/2] rust: use glib-sys
[PATCH v2 0/3] Enable ESRTPS and simplify caching-mode=on check
2025-10-01 7:22 UTC (3+ messages)
` [PATCH v2 3/3] pci: Fix wrong parameter passing to pci_device_get_iommu_bus_devfn()
[PATCH 0/2] Optimize unmap_all with one ioctl()
2025-10-01 6:58 UTC (5+ messages)
` [PATCH 1/2] vfio/container: Support unmap all in "
[PULL v2 00/13] Error reporting patches for 2025-09-30
2025-10-01 6:51 UTC (2+ messages)
` [PULL v2 11/13] ui/dbus: Consistent handling of texture mutex failure
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