From: Blue Swirl <blauwirbel@gmail.com>
To: Gleb Natapov <gleb@redhat.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 0/5] boot order specification
Date: Tue, 26 Oct 2010 17:00:25 +0000 [thread overview]
Message-ID: <AANLkTikAKE=0u_XuNaZUBpc38PDE-pcwwXNh2cPvJy77@mail.gmail.com> (raw)
In-Reply-To: <20101026154313.GC2764@redhat.com>
On Tue, Oct 26, 2010 at 3:43 PM, Gleb Natapov <gleb@redhat.com> wrote:
> On Tue, Oct 26, 2010 at 03:35:38PM +0000, Blue Swirl wrote:
>> On Tue, Oct 26, 2010 at 10:48 AM, Gleb Natapov <gleb@redhat.com> wrote:
>> > This is current sate of the patch series for people to comment on.
>> > I dropped ioport double reservation checking from isa-bus and added
>> > bus_id field for IDE bus since as Markus pointed out unit has different
>> > meaning there.
>> >
>> > This patch series produce names like:
>> >
>> > ISA@03f1-03f5,03f7/fd@a
>> > ISA@03f1-03f5,03f7/fd@b
>> > PCI@0000:00:01.1/IDE@1:0
>> > PCI@0000:00:01.1/IDE@1:1
>> > PCI@0000:00:03.0/virtio-blk@0
>> > PCI@0000:00:04.0/virtio-net@0
>> >
>> > They will be passed to BIOS to determine boot order.
>>
>> We also use OpenBIOS for PPC and Sparcs. A compatible boot device for
>> those would be OpenFirmware tree name. I think your names should then
>> become:
>> /pci/isa/fdc@3f1/fd@0
>> /pci/isa/fdc@3f1/fd@1
> Why is it PCI?
I just assumed a PCI to ISA bridge.
>> /pci/ide@0/1,0
>> /pci/ide@0/1,1
> Where pci address here?
>
>> /pci/virtio-net@1
>> /pci/virtio-net@2
> And here?
That was the part I invented.
> And we will need to describe ROMs too. I planned to have something like:
> ROM@romfilename for roms loaded with -option-rom command line option.
I don't think OF has standard for those.
>>
>> The PCI addressing scheme in OF was a bit twisty, I just invented
>> integers in place of those.
>>
>> Anyway, I don't think we should invent yet another device path naming system.
> IS this format documented somewhere? I am not attached to specific
> format at all.
A lot of docs are here:
http://playground.sun.com/pub/p1275/home.html
Here's the PCI bindings doc:
http://playground.sun.com/pub/p1275/bindings/pci/pci2_1.pdf
next prev parent reply other threads:[~2010-10-26 17:00 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-10-26 10:48 [Qemu-devel] [PATCH 0/5] boot order specification Gleb Natapov
2010-10-26 10:48 ` [Qemu-devel] [PATCH 1/5] Keep track of ISA ports ISA device is using in qdev Gleb Natapov
2010-10-26 13:25 ` Anthony Liguori
2010-10-26 13:30 ` Gleb Natapov
2010-10-26 13:32 ` Anthony Liguori
2010-10-26 15:42 ` Blue Swirl
2010-10-26 10:48 ` [Qemu-devel] [PATCH 2/5] Add get_dev_path callback to ISA bus " Gleb Natapov
2010-10-26 10:48 ` [Qemu-devel] [PATCH 3/5] Store IDE bus id in IDEBus structure for easy access Gleb Natapov
2010-10-26 10:48 ` [Qemu-devel] [PATCH 4/5] Add get_dev_path callback to IDE bus Gleb Natapov
2010-10-26 10:48 ` [Qemu-devel] [PATCH 5/5] Add bootindex parameter to net/block/fd device Gleb Natapov
2010-10-26 13:29 ` Anthony Liguori
2010-10-26 14:16 ` Gleb Natapov
2010-10-26 12:40 ` [Qemu-devel] [PATCH 0/5] boot order specification Bernhard Kohl
2010-10-26 13:07 ` Gleb Natapov
2010-10-26 13:35 ` Bernhard Kohl
2010-10-26 13:38 ` Gleb Natapov
2010-10-26 15:35 ` Blue Swirl
2010-10-26 15:43 ` Gleb Natapov
2010-10-26 17:00 ` Blue Swirl [this message]
2010-10-26 19:35 ` Gleb Natapov
2010-10-26 19:57 ` Blue Swirl
2010-10-26 20:34 ` Gleb Natapov
2010-10-26 20:49 ` Blue Swirl
2010-10-26 21:02 ` Gleb Natapov
2010-10-26 21:14 ` Scott Wood
2010-10-27 8:57 ` Gleb Natapov
2010-10-27 16:39 ` Scott Wood
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