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From: Blue Swirl <blauwirbel@gmail.com>
Date: Tue, 26 Oct 2010 17:00:25 +0000
Message-ID: <AANLkTikAKE=0u_XuNaZUBpc38PDE-pcwwXNh2cPvJy77@mail.gmail.com>
Subject: Re: [Qemu-devel] [PATCH 0/5] boot order specification
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To: Gleb Natapov <gleb@redhat.com>
Cc: qemu-devel@nongnu.org

On Tue, Oct 26, 2010 at 3:43 PM, Gleb Natapov <gleb@redhat.com> wrote:
> On Tue, Oct 26, 2010 at 03:35:38PM +0000, Blue Swirl wrote:
>> On Tue, Oct 26, 2010 at 10:48 AM, Gleb Natapov <gleb@redhat.com> wrote:
>> > This is current sate of the patch series for people to comment on.
>> > I dropped ioport double reservation checking from isa-bus and added
>> > bus_id field for IDE bus since as Markus pointed out unit has different
>> > meaning there.
>> >
>> > This patch series produce names like:
>> >
>> > ISA@03f1-03f5,03f7/fd@a
>> > ISA@03f1-03f5,03f7/fd@b
>> > PCI@0000:00:01.1/IDE@1:0
>> > PCI@0000:00:01.1/IDE@1:1
>> > PCI@0000:00:03.0/virtio-blk@0
>> > PCI@0000:00:04.0/virtio-net@0
>> >
>> > They will be passed to BIOS to determine boot order.
>>
>> We also use OpenBIOS for PPC and Sparcs. A compatible boot device for
>> those would be OpenFirmware tree name. I think your names should then
>> become:
>> /pci/isa/fdc@3f1/fd@0
>> /pci/isa/fdc@3f1/fd@1
> Why is it PCI?

I just assumed a PCI to ISA bridge.

>> /pci/ide@0/1,0
>> /pci/ide@0/1,1
> Where pci address here?
>
>> /pci/virtio-net@1
>> /pci/virtio-net@2
> And here?

That was the part I invented.

> And we will need to describe ROMs too. I planned to have something like:
> ROM@romfilename for roms loaded with -option-rom command line option.

I don't think OF has standard for those.

>>
>> The PCI addressing scheme in OF was a bit twisty, I just invented
>> integers in place of those.
>>
>> Anyway, I don't think we should invent yet another device path naming system.
> IS this format documented somewhere? I am not attached to specific
> format at all.

A lot of docs are here:
http://playground.sun.com/pub/p1275/home.html

Here's the PCI bindings doc:
http://playground.sun.com/pub/p1275/bindings/pci/pci2_1.pdf