From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=47040 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OSxNr-0001S9-NY for qemu-devel@nongnu.org; Sun, 27 Jun 2010 15:19:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OSxMF-0003sW-RR for qemu-devel@nongnu.org; Sun, 27 Jun 2010 15:17:37 -0400 Received: from mail-px0-f173.google.com ([209.85.212.173]:42714) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OSxMF-0003sP-DE for qemu-devel@nongnu.org; Sun, 27 Jun 2010 15:17:35 -0400 Received: by pxi2 with SMTP id 2so309529pxi.4 for ; Sun, 27 Jun 2010 12:17:34 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1277470342-5861-5-git-send-email-pbonzini@redhat.com> References: <1277470342-5861-1-git-send-email-pbonzini@redhat.com> <1277470342-5861-5-git-send-email-pbonzini@redhat.com> From: Blue Swirl Date: Sun, 27 Jun 2010 19:17:14 +0000 Message-ID: Subject: Re: [Qemu-devel] [PATCH 4/7] provide opaque CPUState to files that are compiled once Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: Amit Shah , Isaku Yamahata , qemu-devel@nongnu.org On Fri, Jun 25, 2010 at 12:52 PM, Paolo Bonzini wrote= : > This patch unpoisons CPUState and env in once-compiled files. > To achieve this, it defines an opaque struct CPUState in cpu-common.h. > This also requires tweaking the relationship between CPUState and > CPUXYZState in target files. > > Unpoisoning env is needed because it is widely used as the name for > CPUState arguments. =C2=A0To avoid having references to the global regist= er > variable creeping into target-independent files, the patch rationalizes > inclusions at the head of target-*/exec.h. =C2=A0All exec.h files now inc= lude > cpu.h explicitly and very early. =C2=A0Inclusions from machine-independen= t > context will then error out in cpu-defs.h, even if env is not poisoned. I'm not comfortable with this part. Accidental use of the global register variable can cause subtle bugs. I'd rather rename 'env' to something more obvious and less likely to collide, like 'global_reg_env' and always poison that. Then we could replace 'env1' etc with just 'env'. > > Signed-off-by: Paolo Bonzini > --- > =C2=A0cpu-common.h =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2= =A03 +++ > =C2=A0cpu-defs.h =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 | =C2= =A0 =C2=A01 + > =C2=A0poison.h =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 | = =C2=A0 =C2=A03 --- > =C2=A0target-alpha/cpu.h =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A04 +--- > =C2=A0target-alpha/exec.h =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A06 ++---- > =C2=A0target-arm/cpu.h =C2=A0 =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A06 +++--= - > =C2=A0target-arm/exec.h =C2=A0 =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A05 ++--- > =C2=A0target-cris/cpu.h =C2=A0 =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A06 +++--= - > =C2=A0target-cris/exec.h =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A06 +++--- > =C2=A0target-i386/cpu.h =C2=A0 =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A06 +++--= - > =C2=A0target-i386/exec.h =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A07 ++----- > =C2=A0target-m68k/cpu.h =C2=A0 =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A06 +++--= - > =C2=A0target-m68k/exec.h =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A06 +++--- > =C2=A0target-microblaze/cpu.h =C2=A0| =C2=A0 =C2=A07 +++---- > =C2=A0target-microblaze/exec.h | =C2=A0 =C2=A06 +++--- > =C2=A0target-mips/cpu.h =C2=A0 =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A05 +---- > =C2=A0target-mips/exec.h =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A06 ++---- > =C2=A0target-ppc/cpu.h =C2=A0 =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A03 +-- > =C2=A0target-ppc/exec.h =C2=A0 =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A02 -- > =C2=A0target-s390x/cpu.h =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A06 +++--- > =C2=A0target-s390x/exec.h =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A07 +++---- > =C2=A0target-sh4/cpu.h =C2=A0 =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A06 +++--= - > =C2=A0target-sh4/exec.h =C2=A0 =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A05 ++--- > =C2=A0target-sparc/cpu.h =C2=A0 =C2=A0 =C2=A0 | =C2=A0 =C2=A06 +++--- > =C2=A0target-sparc/exec.h =C2=A0 =C2=A0 =C2=A0| =C2=A0 =C2=A03 +++ > =C2=A025 files changed, 56 insertions(+), 71 deletions(-) > > diff --git a/cpu-common.h b/cpu-common.h > index b24cecc..f325e60 100644 > --- a/cpu-common.h > +++ b/cpu-common.h > @@ -18,6 +18,9 @@ > =C2=A0#include "bswap.h" > =C2=A0#include "qemu-queue.h" > > +struct CPUState; > +typedef struct CPUState CPUState; > + > =C2=A0#if !defined(CONFIG_USER_ONLY) > > =C2=A0/* address in the RAM (different from a physical address) */ > diff --git a/cpu-defs.h b/cpu-defs.h > index 8d4bf86..f56e85b 100644 > --- a/cpu-defs.h > +++ b/cpu-defs.h > @@ -30,6 +30,7 @@ > =C2=A0#include "osdep.h" > =C2=A0#include "qemu-queue.h" > =C2=A0#include "targphys.h" > +#include "cpu-common.h" > > =C2=A0#ifndef TARGET_LONG_BITS > =C2=A0#error TARGET_LONG_BITS must be defined before including this heade= r > diff --git a/poison.h b/poison.h > index d7db7f4..e7814cb 100644 > --- a/poison.h > +++ b/poison.h > @@ -33,9 +33,6 @@ > =C2=A0#pragma GCC poison TARGET_PAGE_BITS > =C2=A0#pragma GCC poison TARGET_PAGE_ALIGN > > -#pragma GCC poison CPUState > -#pragma GCC poison env > - > =C2=A0#pragma GCC poison CPU_INTERRUPT_HARD > =C2=A0#pragma GCC poison CPU_INTERRUPT_EXITTB > =C2=A0#pragma GCC poison CPU_INTERRUPT_TIMER > diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h > index 314d6ac..795b2bd 100644 > --- a/target-alpha/cpu.h > +++ b/target-alpha/cpu.h > @@ -24,7 +24,7 @@ > > =C2=A0#define TARGET_LONG_BITS 64 > > -#define CPUState struct CPUAlphaState > +#define CPUAlphaState CPUState > > =C2=A0#include "cpu-defs.h" > > @@ -317,8 +317,6 @@ enum { > =C2=A0 =C2=A0 IPR_LAST, > =C2=A0}; > > -typedef struct CPUAlphaState CPUAlphaState; > - > =C2=A0typedef struct pal_handler_t pal_handler_t; > =C2=A0struct pal_handler_t { > =C2=A0 =C2=A0 /* Reset */ > diff --git a/target-alpha/exec.h b/target-alpha/exec.h > index 66526e2..789305f 100644 > --- a/target-alpha/exec.h > +++ b/target-alpha/exec.h > @@ -21,8 +21,9 @@ > =C2=A0#define __ALPHA_EXEC_H__ > > =C2=A0#include "config.h" > - > =C2=A0#include "dyngen-exec.h" > +#include "cpu.h" > +#include "exec-all.h" > > =C2=A0#define TARGET_LONG_BITS 64 > > @@ -32,9 +33,6 @@ register struct CPUAlphaState *env asm(AREG0); > =C2=A0#define SPARAM(n) ((int32_t)PARAM##n) > =C2=A0#define FP_STATUS (env->fp_status) > > -#include "cpu.h" > -#include "exec-all.h" > - > =C2=A0#if !defined(CONFIG_USER_ONLY) > =C2=A0#include "softmmu_exec.h" > =C2=A0#endif /* !defined(CONFIG_USER_ONLY) */ > diff --git a/target-arm/cpu.h b/target-arm/cpu.h > index f3d138d..b6cf887 100644 > --- a/target-arm/cpu.h > +++ b/target-arm/cpu.h > @@ -23,7 +23,7 @@ > > =C2=A0#define ELF_MACHINE =C2=A0 =C2=A0EM_ARM > > -#define CPUState struct CPUARMState > +#define CPUARMState CPUState > > =C2=A0#include "cpu-defs.h" > > @@ -70,7 +70,7 @@ struct arm_boot_info; > =C2=A0 =C2=A0s<2n+1> maps to the most significant half of d > =C2=A0*/ > > -typedef struct CPUARMState { > +struct CPUARMState { > =C2=A0 =C2=A0 /* Regs for current mode. =C2=A0*/ > =C2=A0 =C2=A0 uint32_t regs[16]; > =C2=A0 =C2=A0 /* Frequently accessed CPSR bits are stored separately for = efficiently. > @@ -206,7 +206,7 @@ typedef struct CPUARMState { > =C2=A0 =C2=A0 } cp[15]; > =C2=A0 =C2=A0 void *nvic; > =C2=A0 =C2=A0 struct arm_boot_info *boot_info; > -} CPUARMState; > +}; > > =C2=A0CPUARMState *cpu_arm_init(const char *cpu_model); > =C2=A0void arm_translate_init(void); > diff --git a/target-arm/exec.h b/target-arm/exec.h > index 0225c3f..4042eca 100644 > --- a/target-arm/exec.h > +++ b/target-arm/exec.h > @@ -18,14 +18,13 @@ > =C2=A0*/ > =C2=A0#include "config.h" > =C2=A0#include "dyngen-exec.h" > +#include "cpu.h" > +#include "exec-all.h" > > =C2=A0register struct CPUARMState *env asm(AREG0); > > =C2=A0#define M0 =C2=A0 env->iwmmxt.val > > -#include "cpu.h" > -#include "exec-all.h" > - > =C2=A0static inline int cpu_has_work(CPUState *env) > =C2=A0{ > =C2=A0 =C2=A0 return (env->interrupt_request & > diff --git a/target-cris/cpu.h b/target-cris/cpu.h > index a62d57c..6cb080a 100644 > --- a/target-cris/cpu.h > +++ b/target-cris/cpu.h > @@ -22,7 +22,7 @@ > > =C2=A0#define TARGET_LONG_BITS 32 > > -#define CPUState struct CPUCRISState > +#define CPUCRISState CPUState > > =C2=A0#include "cpu-defs.h" > > @@ -96,7 +96,7 @@ > > =C2=A0#define NB_MMU_MODES 2 > > -typedef struct CPUCRISState { > +struct CPUCRISState { > =C2=A0 =C2=A0 =C2=A0 =C2=A0uint32_t regs[16]; > =C2=A0 =C2=A0 =C2=A0 =C2=A0/* P0 - P15 are referred to as special registe= rs in the docs. =C2=A0*/ > =C2=A0 =C2=A0 =C2=A0 =C2=A0uint32_t pregs[16]; > @@ -158,7 +158,7 @@ typedef struct CPUCRISState { > =C2=A0 =C2=A0 =C2=A0 =C2=A0void *load_info; > > =C2=A0 =C2=A0 =C2=A0 =C2=A0CPU_COMMON > -} CPUCRISState; > +}; > > =C2=A0CPUCRISState *cpu_cris_init(const char *cpu_model); > =C2=A0int cpu_cris_exec(CPUCRISState *s); > diff --git a/target-cris/exec.h b/target-cris/exec.h > index 728aa80..af0103d 100644 > --- a/target-cris/exec.h > +++ b/target-cris/exec.h > @@ -17,13 +17,13 @@ > =C2=A0* You should have received a copy of the GNU Lesser General Public > =C2=A0* License along with this library; if not, see . > =C2=A0*/ > +#include "config.h" > =C2=A0#include "dyngen-exec.h" > - > -register struct CPUCRISState *env asm(AREG0); > - > =C2=A0#include "cpu.h" > =C2=A0#include "exec-all.h" > > +register struct CPUCRISState *env asm(AREG0); > + > =C2=A0#if !defined(CONFIG_USER_ONLY) > =C2=A0#include "softmmu_exec.h" > =C2=A0#endif > diff --git a/target-i386/cpu.h b/target-i386/cpu.h > index 8dafa0d..929f252 100644 > --- a/target-i386/cpu.h > +++ b/target-i386/cpu.h > @@ -41,7 +41,7 @@ > =C2=A0#define ELF_MACHINE =C2=A0 =C2=A0EM_386 > =C2=A0#endif > > -#define CPUState struct CPUX86State > +#define CPUX86State CPUState > > =C2=A0#include "cpu-defs.h" > > @@ -581,7 +581,7 @@ typedef struct { > > =C2=A0#define NB_MMU_MODES 2 > > -typedef struct CPUX86State { > +struct CPUX86State { > =C2=A0 =C2=A0 /* standard registers */ > =C2=A0 =C2=A0 target_ulong regs[CPU_NB_REGS]; > =C2=A0 =C2=A0 target_ulong eip; > @@ -718,7 +718,7 @@ typedef struct CPUX86State { > =C2=A0 =C2=A0 uint16_t fpus_vmstate; > =C2=A0 =C2=A0 uint16_t fptag_vmstate; > =C2=A0 =C2=A0 uint16_t fpregs_format_vmstate; > -} CPUX86State; > +}; > > =C2=A0CPUX86State *cpu_x86_init(const char *cpu_model); > =C2=A0int cpu_x86_exec(CPUX86State *s); > diff --git a/target-i386/exec.h b/target-i386/exec.h > index 4ff3c57..29b741a 100644 > --- a/target-i386/exec.h > +++ b/target-i386/exec.h > @@ -18,6 +18,8 @@ > =C2=A0*/ > =C2=A0#include "config.h" > =C2=A0#include "dyngen-exec.h" > +#include "cpu.h" > +#include "exec-all.h" > > =C2=A0/* XXX: factorize this mess */ > =C2=A0#ifdef TARGET_X86_64 > @@ -26,8 +28,6 @@ > =C2=A0#define TARGET_LONG_BITS 32 > =C2=A0#endif > > -#include "cpu-defs.h" > - > =C2=A0register struct CPUX86State *env asm(AREG0); > > =C2=A0#include "qemu-common.h" > @@ -63,9 +63,6 @@ register struct CPUX86State *env asm(AREG0); > =C2=A0#define ST(n) =C2=A0(env->fpregs[(env->fpstt + (n)) & 7].d) > =C2=A0#define ST1 =C2=A0 =C2=A0ST(1) > > -#include "cpu.h" > -#include "exec-all.h" > - > =C2=A0/* op_helper.c */ > =C2=A0void do_interrupt(int intno, int is_int, int error_code, > =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 target_ulo= ng next_eip, int is_hw); > diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h > index b2f37ec..ac2fa84 100644 > --- a/target-m68k/cpu.h > +++ b/target-m68k/cpu.h > @@ -22,7 +22,7 @@ > > =C2=A0#define TARGET_LONG_BITS 32 > > -#define CPUState struct CPUM68KState > +#define CPUM68KState CPUState > > =C2=A0#include "cpu-defs.h" > > @@ -56,7 +56,7 @@ > > =C2=A0#define NB_MMU_MODES 2 > > -typedef struct CPUM68KState { > +struct CPUM68KState { > =C2=A0 =C2=A0 uint32_t dregs[8]; > =C2=A0 =C2=A0 uint32_t aregs[8]; > =C2=A0 =C2=A0 uint32_t pc; > @@ -112,7 +112,7 @@ typedef struct CPUM68KState { > =C2=A0 =C2=A0 CPU_COMMON > > =C2=A0 =C2=A0 uint32_t features; > -} CPUM68KState; > +}; > > =C2=A0void m68k_tcg_init(void); > =C2=A0CPUM68KState *cpu_m68k_init(const char *cpu_model); > diff --git a/target-m68k/exec.h b/target-m68k/exec.h > index ece9aa0..b611282 100644 > --- a/target-m68k/exec.h > +++ b/target-m68k/exec.h > @@ -17,13 +17,13 @@ > =C2=A0* You should have received a copy of the GNU Lesser General Public > =C2=A0* License along with this library; if not, see . > =C2=A0*/ > +#include "config.h" > =C2=A0#include "dyngen-exec.h" > - > -register struct CPUM68KState *env asm(AREG0); > - > =C2=A0#include "cpu.h" > =C2=A0#include "exec-all.h" > > +register struct CPUM68KState *env asm(AREG0); > + > =C2=A0#if !defined(CONFIG_USER_ONLY) > =C2=A0#include "softmmu_exec.h" > =C2=A0#endif > diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h > index ff8c8c8..f40f57f 100644 > --- a/target-microblaze/cpu.h > +++ b/target-microblaze/cpu.h > @@ -21,10 +21,9 @@ > > =C2=A0#define TARGET_LONG_BITS 32 > > -#define CPUState struct CPUMBState > +#define CPUMBState CPUState > > =C2=A0#include "cpu-defs.h" > -struct CPUMBState; > =C2=A0#if !defined(CONFIG_USER_ONLY) > =C2=A0#include "mmu.h" > =C2=A0#endif > @@ -199,7 +198,7 @@ struct CPUMBState; > =C2=A0#define CC_EQ =C2=A00 > > =C2=A0#define NB_MMU_MODES =C2=A0 =C2=A03 > -typedef struct CPUMBState { > +struct CPUMBState { > =C2=A0 =C2=A0 uint32_t debug; > =C2=A0 =C2=A0 uint32_t btaken; > =C2=A0 =C2=A0 uint32_t btarget; > @@ -230,7 +229,7 @@ typedef struct CPUMBState { > =C2=A0#endif > > =C2=A0 =C2=A0 CPU_COMMON > -} CPUMBState; > +}; > > =C2=A0CPUState *cpu_mb_init(const char *cpu_model); > =C2=A0int cpu_mb_exec(CPUState *s); > diff --git a/target-microblaze/exec.h b/target-microblaze/exec.h > index 646701c..813d3d6 100644 > --- a/target-microblaze/exec.h > +++ b/target-microblaze/exec.h > @@ -16,13 +16,13 @@ > =C2=A0* You should have received a copy of the GNU Lesser General Public > =C2=A0* License along with this library; if not, see . > =C2=A0*/ > +#include "config.h" > =C2=A0#include "dyngen-exec.h" > - > -register struct CPUMBState *env asm(AREG0); > - > =C2=A0#include "cpu.h" > =C2=A0#include "exec-all.h" > > +register struct CPUMBState *env asm(AREG0); > + > =C2=A0#if !defined(CONFIG_USER_ONLY) > =C2=A0#include "softmmu_exec.h" > =C2=A0#endif > diff --git a/target-mips/cpu.h b/target-mips/cpu.h > index c21b8e4..b0e86c2 100644 > --- a/target-mips/cpu.h > +++ b/target-mips/cpu.h > @@ -5,7 +5,7 @@ > > =C2=A0#define ELF_MACHINE =C2=A0 =C2=A0EM_MIPS > > -#define CPUState struct CPUMIPSState > +#define CPUMIPSState CPUState > > =C2=A0#include "config.h" > =C2=A0#include "mips-defs.h" > @@ -19,8 +19,6 @@ typedef unsigned char =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 uint_fast8_t; > =C2=A0typedef unsigned int =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0uint_= fast16_t; > =C2=A0#endif > > -struct CPUMIPSState; > - > =C2=A0typedef struct r4k_tlb_t r4k_tlb_t; > =C2=A0struct r4k_tlb_t { > =C2=A0 =C2=A0 target_ulong VPN; > @@ -172,7 +170,6 @@ struct TCState { > =C2=A0 =C2=A0 int32_t CP0_Debug_tcstatus; > =C2=A0}; > > -typedef struct CPUMIPSState CPUMIPSState; > =C2=A0struct CPUMIPSState { > =C2=A0 =C2=A0 TCState active_tc; > =C2=A0 =C2=A0 CPUMIPSFPUContext active_fpu; > diff --git a/target-mips/exec.h b/target-mips/exec.h > index 01e9c4d..070e425 100644 > --- a/target-mips/exec.h > +++ b/target-mips/exec.h > @@ -6,13 +6,11 @@ > =C2=A0#include "config.h" > =C2=A0#include "mips-defs.h" > =C2=A0#include "dyngen-exec.h" > -#include "cpu-defs.h" > - > -register struct CPUMIPSState *env asm(AREG0); > - > =C2=A0#include "cpu.h" > =C2=A0#include "exec-all.h" > > +register struct CPUMIPSState *env asm(AREG0); > + > =C2=A0#if !defined(CONFIG_USER_ONLY) > =C2=A0#include "softmmu_exec.h" > =C2=A0#endif /* !defined(CONFIG_USER_ONLY) */ > diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h > index 2ad4486..a47f12b 100644 > --- a/target-ppc/cpu.h > +++ b/target-ppc/cpu.h > @@ -69,7 +69,7 @@ > > =C2=A0#endif /* defined (TARGET_PPC64) */ > > -#define CPUState struct CPUPPCState > +#define CPUPPCState CPUState > > =C2=A0#include "cpu-defs.h" > > @@ -300,7 +300,6 @@ typedef struct opc_handler_t opc_handler_t; > > =C2=A0/******************************************************************= ***********/ > =C2=A0/* Types used to describe some PowerPC registers */ > -typedef struct CPUPPCState CPUPPCState; > =C2=A0typedef struct ppc_tb_t ppc_tb_t; > =C2=A0typedef struct ppc_spr_t ppc_spr_t; > =C2=A0typedef struct ppc_dcr_t ppc_dcr_t; > diff --git a/target-ppc/exec.h b/target-ppc/exec.h > index 09f592c..651f91a 100644 > --- a/target-ppc/exec.h > +++ b/target-ppc/exec.h > @@ -20,9 +20,7 @@ > =C2=A0#define __PPC_H__ > > =C2=A0#include "config.h" > - > =C2=A0#include "dyngen-exec.h" > - > =C2=A0#include "cpu.h" > =C2=A0#include "exec-all.h" > > diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h > index dd407b2..d30e9da 100644 > --- a/target-s390x/cpu.h > +++ b/target-s390x/cpu.h > @@ -23,7 +23,7 @@ > > =C2=A0#define ELF_MACHINE =C2=A0 =C2=A0EM_S390 > > -#define CPUState struct CPUS390XState > +#define CPUS390XState CPUState > > =C2=A0#include "cpu-defs.h" > > @@ -45,7 +45,7 @@ typedef union FPReg { > =C2=A0 =C2=A0 uint64_t i; > =C2=A0} FPReg; > > -typedef struct CPUS390XState { > +struct CPUS390XState { > =C2=A0 =C2=A0 uint64_t regs[16]; /* GP registers */ > > =C2=A0 =C2=A0 uint32_t aregs[16]; =C2=A0 =C2=A0 =C2=A0 =C2=A0/* access re= gisters */ > @@ -64,7 +64,7 @@ typedef struct CPUS390XState { > =C2=A0 =C2=A0 uint64_t __excp_addr; > > =C2=A0 =C2=A0 CPU_COMMON > -} CPUS390XState; > +}; > > =C2=A0#if defined(CONFIG_USER_ONLY) > =C2=A0static inline void cpu_clone_regs(CPUState *env, target_ulong newsp= ) > diff --git a/target-s390x/exec.h b/target-s390x/exec.h > index 837f853..a848f73 100644 > --- a/target-s390x/exec.h > +++ b/target-s390x/exec.h > @@ -17,14 +17,13 @@ > =C2=A0* License along with this library; if not, see . > =C2=A0*/ > > -#include "dyngen-exec.h" > - > -register struct CPUS390XState *env asm(AREG0); > - > =C2=A0#include "config.h" > +#include "dyngen-exec.h" > =C2=A0#include "cpu.h" > =C2=A0#include "exec-all.h" > > +register struct CPUS390XState *env asm(AREG0); > + > =C2=A0#if !defined(CONFIG_USER_ONLY) > =C2=A0#include "softmmu_exec.h" > =C2=A0#endif /* !defined(CONFIG_USER_ONLY) */ > diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h > index f8b1680..5535ed1 100644 > --- a/target-sh4/cpu.h > +++ b/target-sh4/cpu.h > @@ -36,7 +36,7 @@ > =C2=A0#define SH_CPU_SH7750_ALL (SH_CPU_SH7750 | SH_CPU_SH7750S | SH_CPU_= SH7750R) > =C2=A0#define SH_CPU_SH7751_ALL (SH_CPU_SH7751 | SH_CPU_SH7751R) > > -#define CPUState struct CPUSH4State > +#define CPUSH4State CPUState > > =C2=A0#include "cpu-defs.h" > > @@ -107,7 +107,7 @@ typedef struct memory_content { > =C2=A0 =C2=A0 struct memory_content *next; > =C2=A0} memory_content; > > -typedef struct CPUSH4State { > +struct CPUSH4State { > =C2=A0 =C2=A0 int id; =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0/* CPU model */ > > =C2=A0 =C2=A0 uint32_t flags; =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0/*= general execution flags */ > @@ -157,7 +157,7 @@ typedef struct CPUSH4State { > =C2=A0 =C2=A0 int intr_at_halt; =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0/* SR_B= L ignored during sleep */ > =C2=A0 =C2=A0 memory_content *movcal_backup; > =C2=A0 =C2=A0 memory_content **movcal_backup_tail; > -} CPUSH4State; > +}; > > =C2=A0CPUSH4State *cpu_sh4_init(const char *cpu_model); > =C2=A0int cpu_sh4_exec(CPUSH4State * s); > diff --git a/target-sh4/exec.h b/target-sh4/exec.h > index edd667d..b2eb306 100644 > --- a/target-sh4/exec.h > +++ b/target-sh4/exec.h > @@ -21,12 +21,11 @@ > > =C2=A0#include "config.h" > =C2=A0#include "dyngen-exec.h" > - > -register struct CPUSH4State *env asm(AREG0); > - > =C2=A0#include "cpu.h" > =C2=A0#include "exec-all.h" > > +register struct CPUSH4State *env asm(AREG0); > + > =C2=A0static inline int cpu_has_work(CPUState *env) > =C2=A0{ > =C2=A0 =C2=A0 return (env->interrupt_request & CPU_INTERRUPT_HARD); > diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h > index 8f0484b..a852ee4 100644 > --- a/target-sparc/cpu.h > +++ b/target-sparc/cpu.h > @@ -21,7 +21,7 @@ > =C2=A0# endif > =C2=A0#endif > > -#define CPUState struct CPUSPARCState > +#define CPUSPARCState CPUState > > =C2=A0#include "cpu-defs.h" > > @@ -318,7 +318,7 @@ struct QEMUFile; > =C2=A0void cpu_put_timer(struct QEMUFile *f, CPUTimer *s); > =C2=A0void cpu_get_timer(struct QEMUFile *f, CPUTimer *s); > > -typedef struct CPUSPARCState { > +struct CPUSPARCState { > =C2=A0 =C2=A0 target_ulong gregs[8]; /* general registers */ > =C2=A0 =C2=A0 target_ulong *regwptr; /* pointer to current register windo= w */ > =C2=A0 =C2=A0 target_ulong pc; =C2=A0 =C2=A0 =C2=A0 /* program counter */ > @@ -436,7 +436,7 @@ typedef struct CPUSPARCState { > =C2=A0#define SOFTINT_REG_MASK (SOFTINT_STIMER|SOFTINT_INTRMASK|SOFTINT_T= IMER) > =C2=A0#endif > =C2=A0 =C2=A0 sparc_def_t *def; > -} CPUSPARCState; > +}; > > =C2=A0#ifndef NO_CPU_IO_DEFS > =C2=A0/* helper.c */ > diff --git a/target-sparc/exec.h b/target-sparc/exec.h > index c84e055..260b91e 100644 > --- a/target-sparc/exec.h > +++ b/target-sparc/exec.h > @@ -1,7 +1,10 @@ > =C2=A0#ifndef EXEC_SPARC_H > =C2=A0#define EXEC_SPARC_H 1 > + > =C2=A0#include "config.h" > =C2=A0#include "dyngen-exec.h" > +#include "cpu.h" > +#include "exec-all.h" > > =C2=A0register struct CPUSPARCState *env asm(AREG0); > > -- > 1.7.0.1 > > > >