[Qemu-devel] Re: [PATCH 0/2] pckbd improvements

[Blue Swirl <blauwirbel@gmail.com>]

On 5/17/10, Paolo Bonzini <pbonzini@redhat.com> wrote:
> > > > In 2/2, A20 logic changes a bit but I doubt any guest would be broken
>  > > > if A20 line written through I/O port 92 couldn't be read via i8042.
>  > > > The reverse (write using i8042 and read port 92) will work.
>  > > >
>  > >
>  > >  Why take the risk?
>  >
>  > The alternative is to route a signal from port 92 to i8042. Or maybe
>  > port 92 should belong to i8042, that could make things simpler but
>  > then the port would appear on non-PC architectures as well.
>  >
>  > But I doubt any OS would depend on such details, because the details
>  > seem to be murky:
>  > http://www.win.tue.nl/~aeb/linux/kbd/A20.html
>
>
> True, but I don't see why we should introduce a possible regression.
>  I would at the very least test it on real hardware before doing the
>  change.

I found one description on how i8042 and port 92 A20 lines work
together, chapter 6.11 in
http://www.smsc.com/media/Downloads_Public/Data_Sheets/47s45x.pdf

In that chip, the signals are OR'ed together. As I explained in my
reply to Jamie, QEMU does not implement this.

So I think the correct way is to move the port 92 to pckbd.c and maybe
add OR'ing (worth a separate patch).