Re: [Qemu-devel] Re: [RFT][PATCH 07/15] qemu_irq: Add IRQ handlers with delivery feedback

[Blue Swirl <blauwirbel@gmail.com>]

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On Mon, May 31, 2010 at 5:19 AM, Gleb Natapov <gleb@redhat.com> wrote:
> On Sun, May 30, 2010 at 08:21:30PM +0000, Blue Swirl wrote:
>> On Sun, May 30, 2010 at 8:07 PM, Gleb Natapov <gleb@redhat.com> wrote:
>> > On Sun, May 30, 2010 at 07:37:59PM +0000, Blue Swirl wrote:
>> >> On Sun, May 30, 2010 at 1:49 PM, Gleb Natapov <gleb@redhat.com> wrote:
>> >> > On Sun, May 30, 2010 at 12:56:26PM +0000, Blue Swirl wrote:
>> >> >> >> Well, I'd like to get the test program also trigger it. Now I'm getting:
>> >> >> >> apic: write: 00000350 = 00000000
>> >> >> >> apic: apic_reset_irq_delivered: old coalescing 0
>> >> >> >> apic: apic_local_deliver: vector 3 delivery mode 0
>> >> >> >> apic: apic_set_irq: coalescing 1
>> >> >> >> apic: apic_get_irq_delivered: returning coalescing 1
>> >> >> >> apic: apic_reset_irq_delivered: old coalescing 1
>> >> >> >> apic: apic_local_deliver: vector 3 delivery mode 0
>> >> >> >> apic: apic_set_irq: coalescing 0
>> >> >> >> apic: apic_get_irq_delivered: returning coalescing 0
>> >> >> >> apic: apic_reset_irq_delivered: old coalescing 0
>> >> >> >> apic: apic_local_deliver: vector 3 delivery mode 0
>> >> >> >> apic: apic_set_irq: coalescing 0
>> >> >> >>
>> >> > So interrupt is _alway_ coalesced. If apic_get_irq_delivered() returns
>> >> > 0 it means the interrupt was not delivered.
>> >>
>> >> That seems strange. I changed the program so that the handler gets
>> >> executed, also output a dot to serial from the handler. I changed the
>> >> frequency to 2Hz.
>> >>
>> >> Now, if I leave out -rtc-td-hack, I get the dots at 2Hz as expected.
>> >> With -rtc-td-hack, the dots come out much faster. I added
>> >> DEBUG_COALESCING also to RTC, with that enabled I get:
>> >> qemu -L . -bios coalescing.bin -d in_asm,int -no-hpet -rtc-td-hack -serial stdio
>> >> cmos: coalesced irqs scaled to 0
>> >> cmos: coalesced irqs increased to 1
>> >> cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> .cmos: injecting on ack
>> >> ..cmos: injecting from timer
>> >> .cmos: coalesced irqs increased to 2
>> >> cmos: injecting on ack
>> >>
>> >> So, there are bogus injections.
>> >
>> > Looks like irr in apic is never cleared. Probably bug in userspace apic
>> > emulation. I'll look into it. Try to route interrupt via APIC (not ExtInt),
>> > or use qemu-kvm with in kernel irq chip.
>>
>> With APIC you mean Fixed? Then the IRQ is not delivered at all.
> You need to deliver it through IOAPIC.

In this version, when USE_APIC is defined, IRQs are routed via IOAPIC
and APIC, PIC interrupts are disabled. Otherwise, IOAPIC and APIC are
left to reset state and PIC is used.

With the PIC version, there are bogus injections. With IOAPIC and APIC
dots come at 2Hz. -enable-kvm has no effect.

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#define USE_APIC

        .section .text, "ax"
        .code16gcc

#define O(port, val)            \
        movb    $val, %al;      \
        out     %al, $port
#define O16P(port, val)         \
        movb    $val, %al;      \
        movw    $port, %dx;     \
        out     %al, (%dx)
#define RTC_O(port, val)        \
        O(0x70, port);          \
        O(0x71, val)
#define RTC_I(port)             \
        O(0x70, port);          \
        in      $0x71, %al
#define IOAPIC_O(port, val)     \
        movb    $port, 0xfec00000; \
        movl    $val, 0xfec00010

        .org 0x10000
        .globl start
start:
        /* A20 */
        O(0x92, 0x01)

        /* IDT */
        lidtw   %cs:0x2000

        /* GDT */
        lgdtw   %cs:0x2010

        /* Switch to protected mode */
        movl    %cr0, %eax
        orl     $1, %eax
        movl    %eax, %cr0
        ljmpl   $8, $0xf4000
        .org 0x11000

        .code32

        /* INT 70 handler */
        /* Clear RTC IRQ */
        RTC_I(0xc)
#ifdef USE_APIC
        /* Clear APIC IRQ */
        movl $0x00, 0xfee000b0
#else
        /* Clear PIC IRQs */
        O(0xa0, 0x20)
        O(0x20, 0x20)
#endif
        /* Output a dot */
        O16P(0x3f8, '.')
        iret

        .org 0x12000

        /* IDTD */
        .short 0x0400
        .long 0x0f3000

        .org 0x12010

        /* GDTD */
        .short 0x0020
        .long 0xf3400

        .org 0x13380

        /* IDT entry for INT 70 */
        .long 0x00081000, 0x000f8e00

        .org 0x13408

        /* GDT entry for 1st descriptor, CS */
        .short 0xffff, 0x0000, 0x9b00, 0x00cf
        /* GDT entry for 2nd descriptor, DS etc. */
        .short 0xffff, 0x0000, 0x9300, 0x00cf

        .org 0x14000
        movl    $0x10, %eax
        movw    %ax, %ds
        movw    %ax, %ss
        movl    $0x1000, %esp

        /* Master PIC */
        /* ICW1 */
        O(0x20, 0x11)
        /* ICW2 */
        O(0x21, 0x08)
        /* ICW3 */
        O(0x21, 0x04)
        /* ICW4 */
        O(0x21, 0x01)
#ifdef USE_APIC
        /* OCW1: no IRQs */
        O(0x21, 0xff)
#else
        /* OCW1: only slave IRQs */
        O(0x21, 0xfb)
#endif
        /* Slave PIC */
        /* ICW1 */
        O(0xa0, 0x11)
        /* ICW2 */
        O(0xa1, 0x70)
        /* ICW3 */
        O(0xa1, 0x02)
        /* ICW4 */
        O(0xa1, 0x01)
#ifdef USE_APIC
        /* OCW1: no IRQs */
        O(0xa1, 0xff)
#else
        /* OCW1: only RTC IRQs */
        O(0xa1, 0xfe)
#endif

        /* Serial */
        /* LCR */
        O16P(0x3fb, 0x87)
        /* DLM */
        O16P(0x3f9, 0x00)
        /* DLL */
        O16P(0x3f8, 0x0c)
        /* LCR */
        O16P(0x3fb, 0x07)
        /* MCR */
        O16P(0x3fc, 0x0f)

#ifdef USE_APIC
        /* set up APIC LVT */
        movl    $0x5700, 0xfee00350

        /* enable APIC */
        movl    $0x100, 0xfee000f0

        /* set up IOAPIC LVT */
        IOAPIC_O(0x10 + 8 << 1, 0x0070)
        IOAPIC_O(0x10 + 8 << 1 + 1, 0)
#endif

        /* RTC: frequency 2Hz */
        RTC_O(0xa, 0x2f)
        /* Enable IRQ */
        RTC_O(0xb, 0x40)

        sti
        nop
1:
        hlt
        jmp     1b

        .section .reset, "ax"
        .globl  entry
        .code16gcc
entry:
        cli
        ljmp    $0xf000, $0x0000
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop


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