From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=46609 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PxnzN-0008Bj-QI for qemu-devel@nongnu.org; Thu, 10 Mar 2011 17:05:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PxnzM-0003uA-Pn for qemu-devel@nongnu.org; Thu, 10 Mar 2011 17:05:45 -0500 Received: from mail-iy0-f173.google.com ([209.85.210.173]:56519) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PxnzM-0003u6-Ko for qemu-devel@nongnu.org; Thu, 10 Mar 2011 17:05:44 -0500 Received: by iym7 with SMTP id 7so2357510iym.4 for ; Thu, 10 Mar 2011 14:05:44 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <4D7945A4.4060907@gmx.net> References: <20110310094726.GB14805@redhat.com> <4D78B5BB.5020408@siemens.com> <20110310114801.GC14805@redhat.com> <4D7945A4.4060907@gmx.net> Date: Thu, 10 Mar 2011 14:05:44 -0800 Message-ID: Subject: Re: [Qemu-devel] Re: RFC: emulation of system flash From: Jordan Justen Content-Type: text/plain; charset=ISO-8859-1 List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Carl-Daniel Hailfinger Cc: Gleb Natapov , Jan Kiszka , qemu-devel , Michal Suchanek , Kevin O'Connor , Avi Kivity , Stefan Hajnoczi On Thu, Mar 10, 2011 at 13:41, Carl-Daniel Hailfinger wrote: > Auf 10.03.2011 12:48, Gleb Natapov schrieb: >> Yes we can make memory slot that will be treated as memory on read and >> IO on write, but first relying on that will prevent using flash interface >> on older kernels and second it is not enough to implement the proposal. >> When magic value is written into an address, the address become IO for >> reading too, but KVM slot granularity is page, not byte, so KVM will >> have to remove the slot to make it IO, but KVM can't execute code from >> IO region (yet), so we will not be able to run firmware from flash and >> simultaneously write into the flash. >> > > If you have a Parallel/LPC/FWH flash chip in your mainboard, it is > technically impossible to execute code from flash while you are writing > to _any_ part of the flash chip because every single read from the flash > chip during an active write will toggle one bit of the read data. > So if your code already runs on real x86, you will never hit that problem. > > (SPI flash is an exception, but it uses out-of-band access anyway, > usually via some southbridge interface, and that means the IO vs. > execution conflict won't happen there either.) I've not seen a firmware that attempts to update flash while also executing from flash. For OVMF or UEFI, I don't would not think this should be a requirement. (Although, my proposal would support this.) -Jordan