[Qemu-devel] sparc mmu

[Qemu-devel] sparc mmu

[Artyom Tarasenko]

2010/5/29 Blue Swirl <blauwirbel@gmail.com>:
> Robert Reif did some improvements to SuperSparc emulation, but the
> work was not finished. That should be a good starting point.

Do you mean the last patch he sent to us or are there some earlier
unapplied patches?

The last patch _seems_ to be mainly refactoring and disabling features
which are not
presented in certain models. I might have missed something of course:
the patch is large.

For me is also interesting what do we miss in the microSPARC implementation.
If I switch off POST (which crashes due to the known FPU problems)
LX/CX/X OBPs hang. Looks like it's expecting some interrupt (the SS-5
OBP escapes a similar endless loop on a timer irq), but not getting
it.
Do you know anything obvious qemu is missing in LX machine?

-- 
Regards,
Artyom Tarasenko

solaris/sparc under qemu blog: http://tyom.blogspot.com/

[Qemu-devel] Re: sparc mmu

[Blue Swirl]

On Sat, May 29, 2010 at 9:33 PM, Artyom Tarasenko
<atar4qemu@googlemail.com> wrote:
> 2010/5/29 Blue Swirl <blauwirbel@gmail.com>:
>> Robert Reif did some improvements to SuperSparc emulation, but the
>> work was not finished. That should be a good starting point.
>
> Do you mean the last patch he sent to us or are there some earlier
> unapplied patches?

The last one.

> The last patch _seems_ to be mainly refactoring and disabling features
> which are not
> presented in certain models. I might have missed something of course:
> the patch is large.
>
> For me is also interesting what do we miss in the microSPARC implementation.
> If I switch off POST (which crashes due to the known FPU problems)
> LX/CX/X OBPs hang. Looks like it's expecting some interrupt (the SS-5
> OBP escapes a similar endless loop on a timer irq), but not getting
> it.
> Do you know anything obvious qemu is missing in LX machine?

I don't have a device tree for LX, but unimplemented interrupt sources
could be audio, parallel port, video, modem. Floppy may be buggy.