* [Qemu-devel] when to check external interrupt request ? or what is the timing to check and arise external interrupt ?
@ 2011-02-22 4:47 wang sheng
2011-02-25 15:19 ` Blue Swirl
0 siblings, 1 reply; 2+ messages in thread
From: wang sheng @ 2011-02-22 4:47 UTC (permalink / raw)
To: qemu-devel
I'm porting qemu to an new architecture. I come across some difficulty
that I can't define the timing that enable qemu's main-thread to be
interrupt and check external interrupt .
I understand the way that mips used to check external interrupt .
in qemu-system-mips , during do translation , if there is an
instruction that access CP0's Status register and Cause register, the
"target-mips/translate.c" will add a calling to function "
helper_interrupt_restart" in the end of the translation_block.
But in my architecture which use "load/st" instruction to access the
contr register in interrupt controller . Because I can't
distinguish the access for normal memory and access for interrupt
controller's register , I can't add "interrupt_restart" function
calling in the end of translation block.
How can I do to enable qemu have chance to check external interrupt ?
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] when to check external interrupt request ? or what is the timing to check and arise external interrupt ?
2011-02-22 4:47 [Qemu-devel] when to check external interrupt request ? or what is the timing to check and arise external interrupt ? wang sheng
@ 2011-02-25 15:19 ` Blue Swirl
0 siblings, 0 replies; 2+ messages in thread
From: Blue Swirl @ 2011-02-25 15:19 UTC (permalink / raw)
To: wang sheng; +Cc: qemu-devel
On Tue, Feb 22, 2011 at 6:47 AM, wang sheng <wansheg@gmail.com> wrote:
> I'm porting qemu to an new architecture. I come across some difficulty
> that I can't define the timing that enable qemu's main-thread to be
> interrupt and check external interrupt .
>
> I understand the way that mips used to check external interrupt .
>
> in qemu-system-mips , during do translation , if there is an
> instruction that access CP0's Status register and Cause register, the
> "target-mips/translate.c" will add a calling to function "
> helper_interrupt_restart" in the end of the translation_block.
>
> But in my architecture which use "load/st" instruction to access the
> contr register in interrupt controller . Because I can't
> distinguish the access for normal memory and access for interrupt
> controller's register , I can't add "interrupt_restart" function
> calling in the end of translation block.
>
> How can I do to enable qemu have chance to check external interrupt ?
Please try something similar to how cpu_request_exit function and
signal is used by hw/dma.c and hw/pc.c.
^ permalink raw reply [flat|nested] 2+ messages in thread
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2011-02-22 4:47 [Qemu-devel] when to check external interrupt request ? or what is the timing to check and arise external interrupt ? wang sheng
2011-02-25 15:19 ` Blue Swirl
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