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From: Blue Swirl <blauwirbel@gmail.com>
Date: Fri, 25 Feb 2011 17:19:42 +0200
Message-ID: <AANLkTimR2otn+A3xrAZLefAVaxW86ZgbcOBgVqFQuMZz@mail.gmail.com>
Subject: Re: [Qemu-devel] when to check external interrupt request ? or what
	is the timing to check and arise external interrupt ?
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To: wang sheng <wansheg@gmail.com>
Cc: qemu-devel <qemu-devel@nongnu.org>

On Tue, Feb 22, 2011 at 6:47 AM, wang sheng <wansheg@gmail.com> wrote:
> I'm porting qemu to an new architecture. I come across some difficulty
> that I can't define the timing that enable qemu's main-thread to be
> interrupt and check external interrupt .
>
> I understand the way that mips used to check external interrupt .
>
> in qemu-system-mips , =C2=A0 during do translation , =C2=A0if there is an
> instruction that access CP0's Status register and Cause register, =C2=A0t=
he
> "target-mips/translate.c" will add =C2=A0a calling to function "
> helper_interrupt_restart" =C2=A0in the end of the translation_block.
>
> But in my architecture which use "load/st" instruction to access =C2=A0th=
e
> contr register in interrupt controller . =C2=A0Because =C2=A0 I can't
> distinguish the access for normal memory =C2=A0 and =C2=A0access for =C2=
=A0interrupt
> controller's register , =C2=A0I =C2=A0can't add =C2=A0"interrupt_restart"=
 function
> calling in the end of translation block.
>
> How can I do =C2=A0to enable qemu have chance to check external interrupt=
 ?

Please try something similar to how cpu_request_exit function and
signal is used by hw/dma.c and hw/pc.c.