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From: Blue Swirl <blauwirbel@gmail.com>
Date: Tue, 28 Dec 2010 20:41:46 +0000
Message-ID: <AANLkTimzwZFunzamgBDLVvFDYY1v_mwb+oWLGusptjpt@mail.gmail.com>
Subject: Re: [Qemu-devel] possible regression in qemu-kvm 0.13.0 (memtest)
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To: Stefan Hajnoczi <stefanha@gmail.com>
Cc: Peter Lieven <pl@dlh.net>, qemu-devel@nongnu.org, kvm@vger.kernel.org

On Mon, Dec 27, 2010 at 3:47 AM, Stefan Hajnoczi <stefanha@gmail.com> wrote=
:
> On Sat, Dec 25, 2010 at 7:02 PM, Peter Lieven <pl@dlh.net> wrote:
>> this was the outcome of my bisect session:
>>
>> 956a3e6bb7386de48b642d4fee11f7f86a2fcf9a is first bad commit
>> commit 956a3e6bb7386de48b642d4fee11f7f86a2fcf9a
>> Author: Blue Swirl <blauwirbel@gmail.com>
>> Date: =C2=A0 Sat May 22 07:59:01 2010 +0000
>>
>> =C2=A0 =C2=A0Compile pckbd only once
>>
>> =C2=A0 =C2=A0Use a qemu_irq to indicate A20 line changes. Move I/O port =
92
>> =C2=A0 =C2=A0to pckbd.c.
>>
>> =C2=A0 =C2=A0Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
>>
>> :100644 100644 acbaf227455f931f3ef6dbe0bb4494c6b41f2cd9 1a33d4eb4a5624c5=
5896871b5f4ecde78a49ff28 M =C2=A0 =C2=A0 =C2=A0Makefile.objs
>> :100644 100644 a22484e1e98355a35deeb5038a45fb8fe8685a91 ba5147fbc48e4fae=
f072a5be6b0d69d3201c1e18 M =C2=A0 =C2=A0 =C2=A0Makefile.target
>> :040000 040000 dd03f81a42b5162c93c40c517f45eb9f7bece93c 309f472328632319=
a15128a59715aa63daf4d92c M =C2=A0 =C2=A0 =C2=A0default-configs
>> :040000 040000 83201c4fcde2f592a771479246e0a33a8906515b b1192bce85f2a712=
9fb19cf2fe7462ef168165cb M =C2=A0 =C2=A0 =C2=A0hw
>> bisect run success
>
> Nice job bisecting this! =C2=A0I can reproduce the Memtest86+ V4.10 syste=
m
> reset with qemu-kvm.git and qemu.git.
>
> The following code path is hit when val=3D0x2:
> if (!(val & 1)) {
> =C2=A0 =C2=A0qemu_system_reset_request();
> }
>
> I think unifying ioport 0x92 and KBD_CCMD_WRITE_OUTPORT was incorrect.
> =C2=A0ioport 0x92 is the System Control Port A and resets the system if b=
it
> 0 is 1. =C2=A0The keyboard outport seems to reset if bit 0 is 0.
>
> Here are the links I've found describing the i8042 keyboard controller
> and System Control Port A:
> http://www.computer-engineering.org/ps2keyboard/
> http://www.win.tue.nl/~aeb/linux/kbd/A20.html
>
> Blue Swirl: Any thoughts on this?

SMSC LPC47S45x data sheet (p. 112) also confirms this. The proper fix
is to split the ports.

But then A20 logic becomes more complex, disabling either of keyboard
or port 92 A20 lines should disable system A20 gate.

I think we should move port 92 back to pc.c and add the missing A20
logic there as well.