Re: [Qemu-devel] [PATCH 1/2] Implement basic part of SA-1110/SA-1100

[Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>]

Hello,

On 3/22/11, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 22 March 2011 14:53, Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
> wrote:
>
>>  static inline int arm_feature(CPUARMState *env, int feature)
>> @@ -391,6 +392,19 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum,
>>  #define ARM_CPUID_ARM946      0x41059461
>>  #define ARM_CPUID_TI915T      0x54029152
>>  #define ARM_CPUID_TI925T      0x54029252
>> +#define ARM_CPUID_SA1100      0x4401A11B
>> +#define ARM_CPUID_SA1100_B    0x4401A111
>> +#define ARM_CPUID_SA1100_C    0x4401A112
>> +#define ARM_CPUID_SA1100_D    0x4401A118
>> +#define ARM_CPUID_SA1100_E    0x4401A119
>> +#define ARM_CPUID_SA1100_G    0x4401A11B
>> +#define ARM_CPUID_SA1110      0x6901B119
>> +#define ARM_CPUID_SA1110_A0   0x6901B110
>> +#define ARM_CPUID_SA1110_B0   0x6901B114
>> +#define ARM_CPUID_SA1110_B1   0x6901B115
>> +#define ARM_CPUID_SA1110_B2   0x6901B116
>> +#define ARM_CPUID_SA1110_B4   0x6901B118
>> +#define ARM_CPUID_SA1110_B5   0x6901B119
>>  #define ARM_CPUID_PXA250      0x69052100
>>  #define ARM_CPUID_PXA255      0x69052d00
>>  #define ARM_CPUID_PXA260      0x69052903
>
> Yikes. Do we really need 13 new strongarm CPU types?
> That's half again as many as we currently have defined
> for ARM CPUs of all flavours.

Just followed (more or less) PXA model. What do you suggest? Leave only the
latest ones?

>
>> @@ -1522,6 +1549,8 @@ void HELPER(set_cp15)(CPUState *env, uint32_t insn,
>> uint32_t val)
>>     case 9:
>>         if (arm_feature(env, ARM_FEATURE_OMAPCP))
>>             break;
>> +        if (arm_feature(env, ARM_FEATURE_STRONGARM))
>> +            break; /* Ignore ReadBuffer access */
>>         switch (crm) {
>>         case 0: /* Cache lockdown.  */
>>            switch (op1) {
>
> I know we don't really have very good infrastructure for handling
> device-specific cp15 registers, but I'm not sure defining a new
> FEATURE_STRONGARM is the right approach here. (Yeah, it's just
> following ARM_FEATURE_OMAPCP but I don't like that either :-))
> I'll have a think about whether we can do something cleaner in
> this area (and indeed with the translate-time access checks).

Yeah, OMAPCP, XSCALE and IWMMX. Basically I'd need to plug
into cp15 regs: c9 (this one), c15 (later, idle/wait for interrupt) and
maybe c14 (debug: hwbp, data watch).

> PS: CODING_STYLE mandates braces on all if statements...

Looking around the code it doesn't seem so mandatory... I'll try
fixing my patches though.

-- 
With best wishes
Dmitry