From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=35870 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OV2re-0001it-A7 for qemu-devel@nongnu.org; Sat, 03 Jul 2010 09:34:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OV2rd-0003EG-4q for qemu-devel@nongnu.org; Sat, 03 Jul 2010 09:34:38 -0400 Received: from mail-bw0-f45.google.com ([209.85.214.45]:48185) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OV2rd-0003E8-0O for qemu-devel@nongnu.org; Sat, 03 Jul 2010 09:34:37 -0400 Received: by bwz5 with SMTP id 5so2278173bwz.4 for ; Sat, 03 Jul 2010 06:34:35 -0700 (PDT) MIME-Version: 1.0 From: Artyom Tarasenko Date: Sat, 3 Jul 2010 15:34:15 +0200 Message-ID: Content-Type: text/plain; charset=ISO-8859-1 Subject: [Qemu-devel] sparc slavio_timer or ptimer bug (was sparc mmu) List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: Bob Breuer , qemu-devel@nongnu.org 2010/5/30 Blue Swirl : > On Sat, May 29, 2010 at 9:33 PM, Artyom Tarasenko > wrote: >> For me is also interesting what do we miss in the microSPARC implementation. >> If I switch off POST (which crashes due to the known FPU problems) >> LX/CX/X OBPs hang. Looks like it's expecting some interrupt (the SS-5 >> OBP escapes a similar endless loop on a timer irq), but not getting >> it. >> Do you know anything obvious qemu is missing in LX machine? > > I don't have a device tree for LX, but unimplemented interrupt sources > could be audio, parallel port, video, modem. Floppy may be buggy. Nice try. :) But it was really waiting for the timer irq. The following patch solves the problem, but I'm not sure if it's the proper place for the fix. --- a/hw/slavio_timer.c +++ b/hw/slavio_timer.c @@ -232,6 +231,12 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr, } else { ptimer_set_limit(t->timer, LIMIT_TO_PERIODS(t->limit), 1); } + if (t->running) { + ptimer_stop(t->timer); + ptimer_run(t->timer, 0); + + } + } } break; The interrupt is not generated if the timer has been running at the time ptimer_set_limit() is called. Not sure what is the ptimer_set_limit()'s contract. Should it handle changing the limit on a working timer? The patch makes LX OBP v2.10 sort of functional (it fails on DBRI and cg6 init, but gets up to the "ok" prompt), and SS-10 OBP v2.10 fully functional (with some cpu models). The later is interesting: it autodetects SX/cg14, so can work with the Bob's cg14 patch, as well as without it. -- Regards, Artyom Tarasenko solaris/sparc under qemu blog: http://tyom.blogspot.com/