From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=51628 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OFl5u-0007nD-Gt for qemu-devel@nongnu.org; Sat, 22 May 2010 05:34:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OFl5o-0002jk-Jt for qemu-devel@nongnu.org; Sat, 22 May 2010 05:34:10 -0400 Received: from mail-pw0-f45.google.com ([209.85.160.45]:41940) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OFl5o-0002jQ-7S for qemu-devel@nongnu.org; Sat, 22 May 2010 05:34:04 -0400 Received: by pwj8 with SMTP id 8so808651pwj.4 for ; Sat, 22 May 2010 02:34:03 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: <1274517536-20889-1-git-send-email-atar4qemu@gmail.com> From: Blue Swirl Date: Sat, 22 May 2010 09:33:43 +0000 Message-ID: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] Re: [PATCH] sparc32 protect read-only bits in DMA CSR registers List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Artyom Tarasenko Cc: qemu-devel@nongnu.org On Sat, May 22, 2010 at 9:29 AM, Artyom Tarasenko wrote: > 2010/5/22 Blue Swirl : >> Thanks, applied. You forgot SoB-line, I copied it from the previous vers= ion. > > Sorry. Btw, is there a way to tell 'format-patch' to always include it? > Can't find it in the git docs. Otherwise I'll define an alias so I won't > need to remember about the '-s' switch. [format] thread =3D true signoff =3D true Though format.thread (adds reference headers to the messages, so patches reference the cover letter) does not seem to work with git 1.6.2.4. >> On Sat, May 22, 2010 at 8:38 AM, Artyom Tarasenko >> wrote: >>> On a real hardware changing read-only bits has no effect >>> Use a mask common for SCSI and Ethernet registers. The crucial >>> bit is DMA_INTR, because setting or clearing it may produce >>> spurious interrupts. >>> >>> This patch allows booting Solaris 2.3 >>> --- >>> =C2=A0hw/sparc32_dma.c | =C2=A0 12 ++++++++---- >>> =C2=A01 files changed, 8 insertions(+), 4 deletions(-) >>> >>> diff --git a/hw/sparc32_dma.c b/hw/sparc32_dma.c >>> index 3ceb851..b521707 100644 >>> --- a/hw/sparc32_dma.c >>> +++ b/hw/sparc32_dma.c >>> @@ -62,6 +62,9 @@ >>> =C2=A0#define DMA_DRAIN_FIFO 0x40 >>> =C2=A0#define DMA_RESET 0x80 >>> >>> +/* XXX SCSI and ethernet should have different read-only bit masks */ >>> +#define DMA_CSR_RO_MASK 0xfe000007 >>> + >>> =C2=A0typedef struct DMAState DMAState; >>> >>> =C2=A0struct DMAState { >>> @@ -187,7 +190,7 @@ static void dma_mem_writel(void *opaque, target_phy= s_addr_t addr, uint32_t val) >>> =C2=A0 =C2=A0 switch (saddr) { >>> =C2=A0 =C2=A0 case 0: >>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (val & DMA_INTREN) { >>> - =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (val & DMA_INTR) { >>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (s->dmaregs[0] & DMA_INTR= ) { >>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 DPRINTF("Raise = IRQ\n"); >>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_irq_raise(= s->irq); >>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 } >>> @@ -204,16 +207,17 @@ static void dma_mem_writel(void *opaque, target_p= hys_addr_t addr, uint32_t val) >>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 val &=3D ~DMA_DRAIN_FIFO; >>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 } else if (val =3D=3D 0) >>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 val =3D DMA_DRAIN_FIFO; >>> - =C2=A0 =C2=A0 =C2=A0 =C2=A0val &=3D 0x0fffffff; >>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0val &=3D ~DMA_CSR_RO_MASK; >>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 val |=3D DMA_VER; >>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0s->dmaregs[0] =3D (s->dmaregs[0] & DMA_CSR= _RO_MASK) | val; >>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 break; >>> =C2=A0 =C2=A0 case 1: >>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 s->dmaregs[0] |=3D DMA_LOADED; >>> - =C2=A0 =C2=A0 =C2=A0 =C2=A0break; >>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0/* fall through */ >>> =C2=A0 =C2=A0 default: >>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0s->dmaregs[saddr] =3D val; >>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 break; >>> =C2=A0 =C2=A0 } >>> - =C2=A0 =C2=A0s->dmaregs[saddr] =3D val; >>> =C2=A0} >>> >>> =C2=A0static CPUReadMemoryFunc * const dma_mem_read[3] =3D { >>> -- >>> 1.6.2.5 >>> >>> >> > > > > -- > Regards, > Artyom Tarasenko > > solaris/sparc under qemu blog: http://tyom.blogspot.com/ >